During my PhD, I focused on energy-efficient processor designs and memory hierarchies.
My doctoral work focused on understanding sources of energy inefficiencies in computer systems, and proposing new ideas to address these challenges.
Future computer systems, from the handheld to the data center, face continuing power and energy challenges because the power-per-transistor is no longer scaling down as rapidly as density.
To address energy challenge, system designers need to understand sources of energy inefficiency in computer systems.
In multicore systems, a large fraction of energy is consumed by the memory hierarchy. Memory systems, however, have not been classically designed to minimize energy.
In my dissertation, I proposed new cache memory designs (including Decoupled Compressed Cache) that improve both the performance and energy-efficiency of a multicore system.
In addition, another source of energy-inefficiency, especially in servers in datacenters, is idle energy. In datacenters, where servers usually have low utilization, a large fraction of energy is wasted by systems that are idle. I proposed UniFI, a new low overhead idle power management technique for servers.
In addition to my dissertation work, to evaluate viability and impacts of new ideas in the computer architecture,
I have collaborated with a group of computer architects on developing gem5 simulator.
Much of computer architecture research, including my work, relies on software simulation to prototype and to evaluate
new designs and technologies. With contiguous advances in computer industry and emerging technologies,
computer architects need to study and consider a wide range of designs. Building hardware prototypes for each design
point is not practical as it costs millions of dollars and takes thousands of man-hours. Therefore, computer architects use
software simulators in different stages of designs. gem5 allows flexible modeling to appeal to a broad range of users,
wide availability, and high level of developer interaction to foster collaboration.
Prior to joining UW-Madison, I received my B.S. in Computer Engineering, and M.Sc. in Computer Architecture from University of Tehran, Iran. Before starting my PhD, I was involved in different projects that mainly focused on improving efficiency of resources in out-of-order cores, ASIC and FPGA designs of H.264 encoder, and developing stream processors that support multi-threading.