About Me

Hi! I am Anshul Purohit. Currently enrolled at UW-Madison for Graduate Masters majoring in Computer Sciences. I recently graduated from IIT-Bombay with Bachelor's in Computer Science and Engineering with honors in CSE and minor in Management Science.

I have done research projects in the fields of verification, static analysis of programs and power-performance trade-offs in networked applciation. I have also worked on several course projects based on Operation Systems, Compilers,Computer Architecture, Databases. I have done internships at Microsoft IDC, TU-Braunschweig. Apart for that, I am interested in economics and love travelling.

Research Projects

First is the field of static program analysis. This is part of the compilers and programming languages. I have been working on designing and implementing interprocedural static analysis on concurrent programs.
I have also worked in the field of performance analysis of distributed networked applications. One of my project involves understading the power performance trade-offs of networked applications. I have also worked on the problem of cell outage compensation in mobile networks (simulation), which also has power-performance tradeoffs.

Heap Reference Analysis for Concurrent Programs
Undergraduate Thesis under Prof. Uday Khedkar, IIT-Bombay

Working on understanding program analysis techniques for concurrent programs. Final aim is to implement heap reference analysis for concurrent programs. The analysis should be static and inter-procedural.
Currently understanding the mechanism to perform data flow analysis for non-racy concurrent programs. Need to integrate this with the SOOT framework to perform data flow analysis for Java.
Also working on implementing inter-procedural analysis in SOOT. This requires the use of Context Sensitivity using value contexts (VASCO) for carrying out analysis.
Would need to use VASCO on concurrent programs to implement a heap reference analysis , which is liveness analysis followed by points to analysis on the input program.

Understanding the power-performance of networked applications.
Research & Development Project under Prof. Varsha Apte, IIT-Bombay

Performing validation of the model to estimate the expected power consumption of a networked application.
Main goal is to design experiments on a server cluster and measure the power consumption. This need to be matched with the PowerPerfCenter tool, whose model is to be validated. Also studying the dependence between the operating frequency of a CPU, CPU utilization and the average power consumed.
Currently, experimenting by generating different levels of load for a simple web-calendar application hosted on a 8-core machine. Also performed benchmarking on machines to confirm the linear dependence of power consumed with utilization for a fixed operating CPU frequency.

Cell Outage Compensation
TU-Braunschweig, Germany, Guided by Prof. Thomas Kuerner

Worked on current research problems in self-organizing networks (SON), particularly algorithms for the use case cell-outage compensation in 4th generation cellular networks.
Prototyped the algorithms in the MATLAB-based simulation platform SiMoNe. Compensation of outage would autonomously be achieved by optimally changing the control parameters iteratively.
Also observed a power-performance trade-off in the situation of an outage. High power is required in the neighbouring cells to improve performance in the cell in outage. Presented the results in a colloquium at the institute

Microsoft IDC | Summer Internship Project, Guide: Amit Gupta, Principal Dev Lead, STCI

Added features to the Bing Local results tool Dailymetrics, like searching, email notifications, authentication and check-in issues.
Worked on multiple Microsoft technologies like SQL Server, Azure Cloud Services, ADFS login system, ASP.NET framework and MVC web applications.
Focused on end to end development of the multi-tier features in the tool, from database level to final web deployment.

Virtual Memory Management | Prof. Dhananjay Dhamdhere

Implemented a virtual memory manager for a simplified operating system running on top of Linux. Simulated the operation of a virtual memory manager in a simplified OS running on Linux. The memory allocation scheme was paged and non-contiguous.
Implemented page-in, page-out operations involving memory, swap space of processes, mechanisms to allocate non-contiguous pages, TLB cache and second chance page replacement policy (clock algorithm).

SoulFlower | Winter Internship

Developed a web application to boost sales by suggesting products to consumer in the store. Classification according to the different customer preferences and product ranges.
App was developed in HTML5/JS and also available in Android. Targeted to also train new staff regarding the different types of products.

Buffer Overflow Attack | Prof. Bernard Menezes

Analysed the activation record of functions in the stack map and used the vulnerability of strcpy in which it writes past the allocated memory of the array.
Used strcpy to load shellcode and modify the return address to execute the malicious code to kill all the process and restart.

Artificial Intelligence | Prof. Pushpak Bhattacharya

Implemented a Neural Network to train and classify twitter sentiments.
A* search algorithm implementation on 8-puzzle problem to find optimal solution to goal.
Developed syntactic theorem prover for theorems in Hilbert’s propositional calculus.
Delivered a seminar on Turing’s Test and recent related developments like CAPTCHA.

Checkers | Prof. Amitabha Sanyal

Developed mini Artificial Intelligence engine which implemented the Mini-Max algorithm and Alpha-Beta pruning to decide the optimum move given a board position.
Abstractions and functional language features like higher-order functions were used.

Stock Exchange Portal | Prof Umesh Bellur

Developed a portal for buying and selling stock using JSP, PostgreSQL and JDBC.
Users can place orders and transaction will take place depending on the price and the availability. Used features like SQL-transactions and scheduler for handling DB backend.

Ping Pong | Prof. Ashwin Gumaste

Designed the ping pong game logic and finite state machine in VHDL.
Executed the game on Xilinx Spartan 6 FPGA with HDMI output interface for display.