Name Advisor Yearsort icon Thesis title Thesis file
Marc de Kruijf Karthikeyan Sankaralingam 07/2012 Compiler Construction of Idempotent Regions and Applications in Architecture Design
Dan Gibson David Wood 12/2010 Scalable Cores in Chip Multiprocessors
Dana Vantrease Mikko Lipasti 08/2010 Optical Tokens in Many-Core processors
Matthew Allen Guri Sohi 08/2010 Data-Driven Decomposition of Sequential Programs for Determinate Parallel Execution
Erika Gunadi Mikko Lipasti 05/2010 CRIB: Consolidated Rename, Issue, and Bypass
Jayaram Bobba Mark D. Hill 02/2010 Hardware Support for Efficient Transactional and Supervised Memory Systems
Luke Yen Mark D. Hill 02/2009 Signatures in Transactional Memory Systems
Natalie Enright Jerger
Mikko Lipasti
Li-Shiuan Peh (Princeton)
12/2008 Chip Multiprocessor Coherence and Interconnect System Design
Eric L Hill Mikko Lipasti 12/2008 Understanding and Mitigating the Effects of Soft Errors in Logic
Koushik Chakraborty Guri Sohi 08/2008 Over-provisioned Multicore Systems
Lixin Su Mikko Lipasti 08/2008 Streamlined Atomic Execution for Java
Philip Wells Guri Sohi 07/2008 Adapting to Dynamic Heterogeneity: Virtualization for the Multicore Era
Michael R. Marty Mark D. Hill 01/2008 Cache Coherence Techniques for Multicore Processors
Gordon Bell Mikko Lipasti 12/2007 Latency- and Error-Tolerant Redundant Execution
Jichuan Chang Guri Sohi 08/2007 Cooperative Caching for Chip Multiprocessors
Kevin Moore David Wood 06/2007 Log-based Transactional Memory
Saisanthosh Balakrishnan Guri Sohi 01/2007 Program Demultiplexing: Data-flow Based Speculative Parallelization of Methods in Sequential Programs
Min Xu
Mark Hill
Ras Bodik
05/2006 Race Recording for Multithreaded Deterministic Replay Using Multiprocessor Hardware
Brad Beckmann David Wood 05/2006 Managing Wire Delay in Chip Multiprocessor Caches
Jason Cantin
Mikko Lipasti
James E Smith
05/2006 Coarse-grain Coherence Tracking
Shiliang Hu Jim Smith 03/2006 Efficient Binary Translation in Co-Designed Virtual Machines
Alaa Alameldeen David Wood 03/2006 Using Compression to Improve Chip Multiprocessor Performance
Ho-Seop Kim Jim Smith 12/2004 A Co-designed Virtual Machine for Instruction-Level Distributed Processing (ILDP)
Ashutosh Dhodapkar Jim Smith 12/2004 Automatic Management of Adaptive Microarchitctures
Trey Cain Mikko Lipasti 12/2004 Detecting and Exploiting Causal Relationships in Hardware Shared-Memory Multiprocessors
J. Adam Butts Guri Sohi 08/2004 Optimizing Inter-Instruction Value Communication through Degree of Use Prediction
Ilhyun Kim Mikko Lipasti 05/2004 Macro-op Scheduling and Execution
Milo Martin Mark Hill 12/2003 Token Coherence
Kevin Lepak Mikko Lipasti 09/2003 Exploring, Defining, and Exploiting Recent Store Value Locality
S. Subramanya Sastry
Jim Smith
Rastislav Bodik
01/2003 Techniques for Transparent Runtime Program Specialization Within Dynamic Optimzation Systems
Ravi Rajwar Jim Goodman 09/2002 Speculation-Based Techniques for Transactional Lock-Free Execution of Lock-Based Programs
Craig Zilles Guri Sohi 08/2002 Master/Slave Speculative Parallelization and Approximate Code
Daniel Sorin David Wood 08/2002 Using Lightweight Checkpoint/Recovery to Improve the Availability and Designability of Shared Memory Multiprocessors
Timothy Heil Jim Smith 08/2002 Relational Profiling in Multithreaded Virtual Machines
Amir Roth Guri Sohi 08/2001 Pre-Execution via Speculative Data-Driven Multithreading
Avinash Sodani Guri Sohi 03/2000 Dynamic Instruction Reuse
Eric Rotenberg Jim Smith 09/1999 Trace Processors: Exploiting Hierarchy and Speculation
Trishul Chilimbi
James Larus
Mark Hill
08/1999 Cache-Conscious Data Structures--Design and Implementation
Quinn Jacobson Jim Smith 08/1999 High-Performance Front-ends for Trace Processors
Alain K├Ągi Jim Goodman 01/1999 Mechanisms for Efficient Shared-memory, Lock-based Synchronization
Andreas Moshovos Guri Sohi 12/1998 Memory Dependence Prediction
Doug Burger Jim Goodman 12/1998 Hardware Techniques to Improve the Performance of the Processor/Memory Interface
Scott Breach Guri Sohi 12/1998 Design and Evaluation of a Multiscalar Processor
Stefanos Kaxiras Jim Goodman 08/1998 Identification and Optimization of Sharing Patterns for Scalable Shared-Memory Multiprocessors
Shubu Mukherjee Mark Hill 05/1998 Design and Evaluation of Network Interfaces for System Area Networks
Subbarao Palacharla Jim Smith 02/1998 Complexity-Effective Superscalar Processors
T.N. Vijaykumar Guri Sohi 01/1998 Compiling for the Multiscalar Architecture
Babak Falsafi David Wood 12/1997 Fine-Grain Protocol Execution Mechanisms & Scheduling Policies on SMP Clusters
Ioannis Schoinas Mark Hill 12/1997 Fine-Grain Distributed Shared Memory Systems on Clusters of Workstations
Steven K. Reinhardt David Wood 12/1996 Mechanisms for Distributed Shared Memory
Todd M. Austin Guri Sohi 04/1996 Hardware and Software Mechanisms for Reducing Load Latency
Dionisios Pnevmatikatos Guri Sohi 12/1995 Incorporating Guarded Execution in Existing Instruction Sets
Alvin R. Lebeck David Wood 11/1995 Tools and Techniques for Memory System Design and Analysis
Madhusudhan Talluri Mark Hill 08/1995 Use of Superpages and Subblocking in the Address Translation Hierarchy
Manoj Franklin Guri Sohi 12/1993 The Multiscalar Architecture
Sarita V. Adve Mark Hill 11/1993 Designing Memory Consistency Models for Shared-Memory Multiprocessors
Ross Johnson Jim Goodman 06/1993 Extending the Scalable Coherent Interface for Large-Scale Shared-Memory
Steve Scott Jim Goodman 08/1992 Toward the Design of Large-Scale, Shared-Memory Multiprocessors
Mark Friedman Guri Sohi 01/1992 An Architectural Characterization of Prolog Execution
Sriram Vajapeyam Guri Sohi 12/1991 Instruction Level Characterization of the Cray Y-MP Processor
Men-Chow Chiang Guri Sohi 09/1991 Memory System Design for Bus Based Multiprocessors
Richard E. Kessler Mark Hill 07/1991 Analysis of Multi-Megabyte Secondary CPU Cache Memories
Matthew K. Farrens Andy Pleszkun 08/1989 The Design and Analysis of a High Performance Single Chip Processor
Wei-Chung Hsu Jim Goodman 08/1987 Register Allocation and Code Scheduling for Load/Store Architectures
William Cox
Bob Cook
Jim Goodman
08/1986 The Performance of Disk Servers
Koujuch Liou Jim Goodman 08/1985 Design of Pipelined Memory Systems for Decoupled Architectures
Honesty C. Young Jim Goodman 06/1985 Evaluation of a Decoupled Computer Architecture and the Design of a Vector Extension
Michael Scott Raphael Finkel 05/1985 Design and Implementation of a Distributed Systems Language