(A half-day tutorial)
NEW!! Slides available here.
When: 8:30 AM, April 3rd (Sunday), 2016.
Where: Room "Salon V",† ASPLOS 2016, Atlanta, GA USA
Organizer(s): Arkaprava (Arka) Basu, Andrew G. Kegel (AMD Research)
Applications running on the CPU have accessed memory using virtual addresses since the inception of Memory Management Units (MMUs) in the 1970s. However, peripheral devices continued to access memory using physical addresses through use of Direct Memory Access (DMA). Only since the mid-2000s, with the advent of IOMMU (IO Memory Management Unit) technology in commercial processors, were generic peripheral devices able to access memory using virtual addresses. IOMMU technology has rapidly evolved to enable many critical features of modern day computing. For example, IOMMU is a key technology in extending the CPUís virtual memory to GPUs to enable heterogeneous computing. Furthermore, in a virtualized system, IOMMU enables a guest OS to directly access IO and allows direct interrupt delivery without the hostís intervention. Similarly, IOMMU enables safe and secure user-space access IO in an unvirtualized system.†
Despite the importance of IOMMU in modern computing, the computer architecture community performs little research into this technology. The objective of this tutorial is thus two-fold: to inform our community about state-of-art IO virtualization techniques and to encourage research by sharing key challenges in the evolution of these techniques.
In particular, we will cover the following topics: key motivations behind the introduction of IOMMU, example use cases for IOMMU technology, IOMMUís hardware and software, and key challenges and new research opportunities in IO virtualization.
The primary objectives of this tutorial are to educate the community about IOMMU technology, its usages, and the key challenges and research opportunities in the area. The tutorial content will not assume any previous knowledge about IO virtualization and thus will cover mostly the basics of IOMMU.
Topics to be covered:
1. Motivation and Introduction: What is IOMMU?
a. Deficiencies of traditional DMA operations
b. Deficiencies of traditional interrupt operations
c. Basic purpose and capabilities of IOMMU
2. Usage: What purpose does the IOMMU serve?
a. Supporting legacy devices
b. Enabling security and memory protection
c. Enabling secured boot
d. Direct IO access from guest OS (virtualized system)
e. Enabling heterogeneous computing
3. How does IOMMU work?
a. Hardware and software internals of the IOMMU
b. Step-by-step examples of how the IOMMU performs different operations
†4. Discussion: Challenges and Research Opportunities
Arka Basu: Arka is a researcher at AMD Research. Arka got his PhD from University of Wisconsin in 2013 where he researched on virtual memory.
Paul Blinzer: Paul is a fellow and a software architect at AMD. He is responsible for software for IOMMU and heterogeneous system architectures.
Maggie Chan: Maggie is senior technical staff at AMD and is responsible IOMMU hardware design.
Andy Kegel: Andy is a research manager at AMD Research. He has been one of the architects of AMDís IOMMU technology.