Research Publications

Graduate Publications

  1. StealthTest: Low Overhead Online Software Testing using Transactional Memory,
    Jayaram Bobba, Weiwei Xiong, Luke Yen, Mark D. Hill, and David A. Wood
    Conference on Parallel Architectures and Compilation Techniques (PACT), Sep 2009.
    Local copy: pdf
    Talk: ppt

  2. ACM DL Author-ize serviceTokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
    Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael M. Swift, David A. Wood
    ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture, 2008
    Local copy: pdf
    Talk: ppt

  3. ACM DL Author-ize servicePerformance pathologies in hardware transactional memory
    Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, David A. Wood
    ISCA '07 Proceedings of the 34th annual international symposium on Computer architecture, 2007
    Local copy: pdf
    Talk: ppt
    Extended Talk: ppt

  4. LogTM-SE: Decoupling Hardware Transactional Memory from Caches,
    Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E. Moore, Haris Volos, Mark D. Hill, Michael M. Swift, and David A. Wood
    International Symposium on High Performance Computer Architecture (HPCA), February 2007.
    Local copy: pdf
    Talk: ppt, pdf

  5. ACM DL Author-ize serviceSupporting nested transactional memory in logTM
    Michelle J. Moravan, Jayaram Bobba, Kevin E. Moore, Luke Yen, Mark D. Hill, Ben Liblit, Michael M. Swift, David A. Wood
    ASPLOS XII Proceedings of the 12th international conference on Architectural support for programming languages and operating systems, 2006
    Local copy: pdf
    Talk: pdf, ppt

  6. LogTM: Log-based Transactional Memory,
    Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan, Mark D. Hill and David A. Wood
    International Symposium on High Performance Computer Architecture (HPCA), February 2006.
    Local copy: pdf
    Talk: ppt, pdf
Undergraduate Publications

  1. B. Jayaram, A. Manoj Kumar and V.Kamakoti, "Parallel Partitioning Techniques for Logic Minimization using Redundancy Identification," International Conference on High Performance Computing(HiPC) , December 2003, Hyderabad, India.

  2. Manoj Kumar. A, Jayaram Bobba, Kamakoti. V., "MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays using Reconvergence Analysis",  DATE-2004, Paris.

  3. A. Manoj Kumar, Jayaram Bobba and V. Kamakoti , "SHAPER: Synthesis for Hybrid FPGA Architectures containing PLA elements using Reconvergence Analysis," Twelfth ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2004), Monterey, California, February 2004.

  4. Manoj Kumar.A, Jayaram Bobba, Manimegalai, Kamakoti.V, "MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Arrays," 11th Reconfigurable Architectures Workshop (RAW2004), Santa Fe, New Mexico.

  5. B. Jayaram , A. Manojkumkar, R.Manimegalai, V. Kamakoti, "SHAPER:Synthesis for Hybrid FPGAs containing PLAs using Reconvergence Analysis, " in FPT-2004 Australia.