CS 354, version A
Fall 2005
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Exam 3

No electronic devices may be used while taking this exam. Examples of devices not allowed are calculators, pagers, cell phones, wrist calculators/computers, laptop computers, pocket computers. Each student is allowed one 8.5 by 11 inch sheet of paper with handwritten notes. The notes may be on both sides of the paper.

Show all work, and do any/all calculations on the exam. Extra scratch paper may not be used.

Exam Score
EC = _____ /   5
Q1 = _____ / 10
Q2 = _____ /   6
Q3 = _____ /   6
Q4 = _____ /   5
Q5 = _____ /   6
Q6 = _____ /   4
Q7 = _____ / 14
Q8 = _____ / 25
Q9 = _____ / 12
Total = _____ / 88

Extra Credit Question (5 points)
What did Mel do for the Royal McBee company?



Question 1 (10 points total)
A program follows the MIPS parameter passing and register usage conventions. In this program, main calls A, A calls B, and B calls C. main passes 3 parameters to A, A passes 4 parameters to B, and B passes 2 parameters to C.

Part A (2 points)
C uses only $t registers (no $s registers). Does C need an activation record?



Part B (2 points)
In which register is the third parameter that is passed from A to B?

Part C (6 points)
Diagram B's activation record, assuming that B uses no $t registers, and uses 3 $s registers. Be sure to identify what is in the activation record, as well as the orientation of your diagram.











Question 2 (6 points)
Give a TAL assembly language synthesis for each of the following MIPS pseudoinstructions. Assume that label X has been assigned address 0x00ff3300.


  sw   $8, X




  rem  $10, $11, $12



Question 3 (6 points)
Give MIPS machine code for each of the following MIPS assembly language instructions. Give the final answer both in binary and in hexadecimal.

Assume that label fcn3 has been assigned address 0x0ff0cc00.



  sb   $8, -1($10)








  jal  fcn3










Question 4 (5 points)
In a single, concise sentence, describe the contents of the immediate field of the machine code for a MIPS branch instruction.









Question 5 (6 points)
Suppose that a computer system uses only programmed I/O, together with spin wait loops to handle input and output. There are no interrupts on this computer system, so there is potential for input or output to become lost. The code inside the simplistic kernel to do keyboard input (for a getc syscall) is given below. Modify the code fragment such that it also does keyboard echo.


getc_loop:  lw  $k0, Keyboard_Status


            bgez $k0, getc_loop


            lw   $v0, Keyboard_Data   # return character in $v0



            mfc0 $k0, $14             # get EPC
            rfe                       # return to application
            jr   $k0

Question 6 (4 points)
A MIPS R2000 processor fetches and executes the instruction


  add  $8, $9, $10

Register $9 contains the value 0x00000001, and register $10 contains the value 0x7fffffff. The machine code for this add instruction is at address 0x00400f04. What is the address of the next instruction that is fetched?





Question 7 (14 points total)
Part A (4 points)
Was the kernel used for assignment 8 (the typing test program) reentrant or nonreentrant?
Part B (4 points)
Suppose that a computer system has a simple, nonreentrant kernel. An application has been executing, and the application executes the syscall instruction. As the first instruction within the kernel is fetched, diagram the values in the four (4) least significant bits of the Status register.





Part C (6 points)
Write a MIPS assembly language code fragment (that could be placed within a kernel) that causes the kernel to become reentrant.



Question 8 (25 points total)
The Unrealistic Company is putting an L1 cache that holds only data (not instructions) into their computer system.


Part A (6 points)
Diagram how an address is used (for this L1 cache) to do a cache access. Include the number of bits for each field.





Part B (8 points)
Draw a diagram of this cache, identifying the different parts of the cache, and telling the number of bits (or bytes) associated with each part.















Part C (3 points)
How many Valid bits are there in this cache?

Part D (8 points)
Show your work to calculate the hit ratio (with this cache) for a program that assigns a value to each element of an array of 1000 integers (in sequential order). Assume that all other instructions in the program access variables and values that are in registers.







Question 9 (12 points total)
Part A (5 points)
Draw a MIPS 5-stage pipeline timing diagram for an assembly language code fragment that contains exactly 4 instructions, and has no dependencies.













Part B (5 points)
Give a MIPS assembly language code fragment that contains a single dependency that would cause the MIPS 5-stage pipeline to stall.









Part C (2 points)
Does your code in Part B have a data dependency or a control dependency?