CS 354, version A
Fall 2006 		Name:___________________
ID:___________________
Login:_____________________
Exam 3

No electronic devices may be used while taking this exam. Examples of devices not allowed are calculators, pagers, cell phones, wrist calculators/computers, laptop computers, pocket computers. Each student is allowed one 8.5 by 11 inch sheet of paper with handwritten notes. The notes may be on both sides of the paper.

Show all work, and do any/all calculations on the exam. Extra scratch paper may not be used.

Exam Score
EC = _____ /   4
Q1 = _____ /   4
Q2 = _____ /   6
Q3 = _____ / 14
Q4 = _____ / 10
Q5 = _____ / 20
Q6 = _____ /   4
Q7 = _____ / 10

Total = _____ / 68		 



Extra Credit Question (4 points)


What aspect of the Intel x86 architecture
makes pipelining extremely difficult
(according to Karen)?

 


 


 



Question 1 (4 points total)


No TAL instructions on the MIPS architecture use a direct addressing mode.
Why not?


 


 


 


 





Question 2 (6 points)



Give a TAL assembly language synthesis for the MIPS pseudoinstruction 


    sw  $16, count



assuming that the assembler has assigned 

address 0x0040aa18

for variable count.

 


 


 


 


 





Question 3 (14 points)



Generate MIPS machine code for the following TAL instructions.
Give the machine code in both binary and hexadecimal.
Assume that the assembler assigns 

address 0x06000020 for label loop.



loop:    addi $9, $15, -1
         lw   $8, 4($12)
         beq  $8, $9, loop




 
Place work for the addi instruction here.

 


 


 


 


 
Place work for the lw instruction here.

 


 


 


 


 
Place work for the beq instruction here.

 


 


 


 


 


 


 


 






Question 4 (10 points total)



Part A (4 points)
Is the kernel we used for assignment 8 reentrant or nonreentrant?



 

Part B (6 points)
Write a code fragment (that goes in the kernel) to enable interrupts.
Of the general purpose registers, use only $k0 and $k1. 



 


 


 



Question 5 (20 points total)



Use the cache diagram for this question.
Assume:








Valid
Tag
(in binary)		
Data Block Frames




0
    00010000111111111
    0x00112233 0x44556677 0x8899aabb 0xccddeeff



1
    00010000111111111
    0x00112233 0x44556677 0x8899aabb 0xccddeeff



1
    00010000111111111
    0xffffffff 0x00000000 0x11111111 0x22222222



1
    00010000111111111
    0x33333333 0x44444444 0x55555555 0x66666666



1
    00010000111111111
    0x77777777 0x88888888 0x99999999 0xaaaaaaaa



0
    00010000111110000
    0xbb00bb00 0xcc00cc00 0xdd00dd00 0xee00ee00



0
    00010000111110000
    0xf1f1f1f1 0xe2e2e2e2 0xd3d3d3d3 0xc4c4c4c4



1
    00010000111110000
    0xb5b5b5b5 0x88aa88aa 0x77117711 0x66006600






 
 

Part A (3 points)


How many bits of the address are used for the index #? 

 



Part B (3 points)


How many bits of the address are used for the byte within the block? 

 



Part C (4 points)


Are the given values for the contents of the cache possible?
YES or NO?

 

If you answer NO, briefly explain why they are not possible.

 


 


 

Part D (5 points)


Consider a word access to address 0x10ffa8. 
Does this access HIT or MISS?

 


 


 

Part E (5 points)


Whether or not the word access to address 0x10ffa8 would hit or miss,
identify the location within the cache diagram
where this word either does or will reside.
Circle the word. 

 


 



Question 6 (4 points)


What aspect of performance does pipelining improve?

 


 


 




Question 7 (10 points total)


A programmer writes a program that takes 6 seconds to run.
The programmer then makes improvements such that
the program takes 4 seconds to run.
Assume that all instructions take the same amount of time
to fetch and execute.

 

Part A (5 points)


What is the speedup of this program?

 


 


 

Part B (5 points)


If (before improvement) the assembly language source code for this program
consists of 3000 instructions,
how many instructions were eliminated from the program?
Briefly justify your answer.