Question 1 (7 points)
Give a TAL assembly language synthesis for the MIPS instruction

    sb   $12, X

Question 2 (5 points)
(Briefly) Why do we use interrupt-driven kernels instead of ones that use spin wait loops combined with polling?

Question 3 (8 points total, 4 points each part) A fragment of TAL assembly language code is given by:

  while:  bne $9, $11, end_while
          add  $12, $9, $8
	  sub  $13, $9, $14
	  xori $15, $12, $13
	  addi $9, $9, 1
	  addi $11, $11, -1
          beq  $0, $0, while   # an unconditional branch
  end_while:

Part A
Give the decimal value represented by the offset (immediate) field of the machine code for the bne instruction.

Part B
Give the decimal value represented by the offset (immediate) field of the machine code for the beq instruction.

Question 4 (16 points total)
Part A (3 points)
Is the kernel we used and modified for Assignment 6 intended to be reentrant or nonreentrant?

Part B (3 points)
Would the kernel portion of a commercially available operating system be reentrant or nonreentrant?

Part C (10 points) Write a MIPS assembly language code fragment that could be placed inside of the kernel. This fragment enables interrupts. Of the general purpose registers, the code fragment may only use $k0 and $k1.

Question 5 (24 points total) A single (L1) cache is added to a computer system.

• The memory system is byte addressable.
• Addresses are 24 bits.
• There are 512 block frames in the cache.
• Each block is 8 bytes.

Part A (6 points) This diagram illustrates the address as it is used by the cache. Identify on this diagram the number of bits used for each field.

        -------------------------------------------------
        |   tag    |   index #   |  byte within block   |
        -------------------------------------------------

Part B (4 points) How many valid bit(s) (total) are there in this cache?

Part C (8 points) Write an expression for the hit ratio of this cache with respect to instruction fetch only, if it is benchmarked using the following assumptions:

• This cache only holds instructions.
• Each instruction is 4 bytes.
• The benchmark code executes 100 instructions to initialize variables for a loop and then enters a loop that iterates 500,000 times.
• The loop contains a total of 30 instructions.

Part D (6 points) Using the same benchmark as in Part C, a programmer seeks to improve the performance of this code. The programmer is able to remove 5 instructions from the loop, but must add an extra 100 instructions to the initialization code (to compensate). Assuming that all instructions take the same amount of time to execute, justify whether this improvement is worthwhile using speedup as a metric.