Does the MIPS architecture have byte addressibility or
word addressibility?
Can a byte addressible architecture be designed with
little endian byte numbering, but big endian bit numbering?
Difficult Question.
Describe a situtation where having byte addressibility
matters, and could result in incorrect program operation.
Difficult Question.
Write a MAL program that determines whether the
architecture that the simulator is running on
uses little endian or big endian order.