CS/ECE 552 : Introduction to Computer Architecture (Spring 2005)

Course Information

• Lecture Time
• Instructor and Office Hours
• TA and Office Hours
• Required Course Material
• What's New
• Lecture Notes
• Schedule
• Handouts
• Assignments
• Project
• Exams
• Grading
• Miscellanea

Lecture

• Time : 11:00am - 12:15pm Monday, Wednesday, and Friday (meets twice per week on average, more often early in the semester)
• Location : 107 Psychology

Instructor : David Wood

• Office: 6369 CSS
• Hours: Tuesday and Wednesday 1:30-2:30, or by appointment.
• e-mail: david@cs.wisc.edu
• Phone: 263-7463

TA : Andy Phelps

• Office:  6376 CSS
• Hours: Monday 1:00-2:00, Thursday 3:45-4:45, Friday 2:30-3:30, or by appointment
• e-mail:
• Phone: 265-5907

Required Course Material

 David A. Patterson and John L. Hennessy,
 Computer Organization and Design:  The Hardware and Software Interface
 Morgan Kaufmann Publishers, Third Edition. ISBN: 1-55860-604-1
        NOTE: Some of the assigned readings will be from the CD included with the book

    Required Reference Material

Shing Kong, Revised by Milo Martin
The Elements of Logic Design Style

What's New

• Updates to Project Assignment document, Instruction Set Specification document, and Project Report document.
• The assembler now generates 4-way-interleaved output files in addition to the usual output file, for use with the final 4-bank memory.
• Solution available for Midterm
• Schedule updated: changed due dates for HW5 and HW6.
• Verilog powerpoint slides in Handouts section
• Updates to Using Mentor Remotely

Lecture Notes

    These are Prof. Hill's lecture notes based on the 2nd Edition. These will not be used in the class, but they serve as a useful reference. Accessible from University of  Wisconsin-Madison only.

• Chapter 1 : Introduction
• Chapter 2 : Performance
• Chapter 3 : Instructions
• Chapter 4 Part I : Basic Arithmetic
• Chapter 5 Part I : Datapath
• Chapter 5 Part II : Control
• Chapter 5 Part III : Microprogramming & Exceptions
• Chapter 6 : Pipelining
• Chapter 7 Part I : Caches
• Chapter 7 Part II : Memory and Virtual Memory
• Chapter 4 Part II : More Arithmetic
• Chapter 8 : I/O
• Chapter 9 :  Parallel Processing

Schedule

    Here is the tentative schedule, subject to change with little notice.

Handouts

• Activating your CS account
• FAQ sheet
• Some hints and tips
• Getting started with Mentor  ps  pdf    Important Corrections to this Doc!!!
• Mentor Overview (from a previous semester. Read for getting an idea about designs/components/sheets/symbols/interfaces. Some specific examples may be outdated)
• Yet another Mentor overview from Santa Clara University.
• Various Mentor documentation in pdf. Potentially helpful, but not guaranteed to be up to date. (NOTE -- this may be the same as the mgcdocs help information.)
• Using Mentor Remotely
• Using Verilog with Mentor
• Required Verilog style rules
• Verilog powerpoint slides
• Force File Links
  •  Sample force file for Quicksim II/Qhpro
  •  Sample force file for Qhsim
• Sharing files
• Error Correction/Detection    ps pdf

Assignments

• Assignment 0   (Answer to Problem 3)
• Assignment 1
• Assignment 2
• Assignment 3
• Assignment 4
• Assignment 5
• Assignment 6

Homework assignments are due at the end of class. No credit for late assignments unless otherwise specified.

All work is to be performed alone unless otherwise specified in the assignment.

Project

• Project Assignment
• Final Project Report detailed description
• Instruction Set Specification
• Using the assembler
• Single-cycle Memory Specification
• Cache Specification
• Test programs
  Deadlines:
• Project design and test plan
  • due on Monday, March 6th (in class)
• First demo (non-pipelined implementation)
• Friday, March 31
• Sign ups will be posted
• Second demo (Pipelined implementation with perfect memory)
  • Friday, April 21
  • Sign ups will be posted
• Final presentation and final project report
• Friday, May 5
• Sign ups will be posted for demo
• Reports due at 4:00 pm

Exams

    Final Exam : Thursday, May 11 12:25-2:25 PM
                                    Location: 1240 CSS

    Old Midterm Exams

   Old Final Exam:  Spring '92, Solution

Grading

• Homeworks : 25%
• Midterm : 25%
• Final : 25%
• Project : 25%

Miscellanea

• How to forward your CS mail
• Archive for CS/ECE 552-1 Mailing List
• Computer Systems Lab Documentation
• Wisconsin Computer Architecture Group
• World-Wide Computer Architecture Information

Supplemental Reading

• SPEC CPU2000: Measuring CPU Performance in the new Millenium, John L. Henning, IEEE Computer, July 2000.

Last updated: 05/10/2006 09:38 AM -0500