Demo 2 verification
For the pipelined design, we opt for a simpler trace format called the "pipe-trace". This has a .ptrace extension
Every cycle that a value is being written to the register file (write-back stage), or being read from mem (memory stage), or being stored to memory (mem stage), we will record an entry. PC and the instruction bits will not be recorded. Since NOPs, and branch instruction do not effectively change the registers or memory, they will create no entries in this simplified trace format.
What command do I need to use
wsrun.pl -pipe -prog file.asm proc_hier_pbench *.v
and for mumble-lab machines..
wsrun_mumble.pl -pipe -prog file.asm proc_hier_pbench *.v
What would happen if I do not add the -pipe in the wsrun.pl script
Running arch simulator wiscalculator...
Did not find verilog simulation trace (verilogsim.trace)...something wrong. Contact cs552 staff
What message would I see in the terminal on a successful simulation
Step: 4
Verilog simulation successful
See verilogsim.log and verilogsim.ptrace for output
Created a dump file dump.wlf.
To view waveforms, open with
vsim -view dataset=dump.wlf
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Step: 5
Running arch simulator wiscalculator...
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Step: 6
Comparing arch simulation trace against verilog simulation trace
SUCCESS. Simulations match for /p/course/cs552-david/public/html/S12/project/tests/public/rand_simple/t_1_or.asm.
Summary
You will use proc_hier_pbench.v testbench for demo2 (See the project modules page). wiscalculator generates a compatible .ptrace file. At the end of simulation you will see archsim.ptrace and verilogsim.ptrace
You must run wsrun.pl or wsrun_mumble.pl with the -pipe option while using this testbench
Differences are saved in diff.ptrace. This is an intelligent diff which will annotate the original ptrace fill with the instructions and the PC, so its easier to track failures
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