CS/ECE 552 Introduction to Computer Architecture Spring 2012 Section 1 Instructor David A. Wood and T. A. Ramkumar Ravikumar URL: http://www.cs.wisc.edu/~david/courses/cs552/S12/

What is zero delay oscillation loop error

• The error suggests the presence of a feedback loop in the design. The coding style adopted might be causing the simulator to enter a race condition. A simple example is the presence of an always block having the same variables in the sensitivity (input) list and in the output list. Also incorrect use of blocking and non-blocking statements might lead to race conditions as well (The use of these statements affect the way events are placed in the stratified queue - something we discussed about in the verilog tutorial. Incorrect use might lead to race conditions).

How is the loop detected

• In order to detect the presence of these loops, ModelSim defines a limit, the "iteration limit". When ModelSim reaches the iteration limit, it issues a warning message

How do I resolve zero-delay loops

• Zero-delay loops are difficult to fix as ModelSim will not provide you information about where the loop is present. To look for the loop, run the simulation and look at the source code when the error occurs. Use the step button to step through the code and see which signals or variables are continuously oscillating. Two other common causes are a loop that has no exit, or a series of gates with zero delay where the outputs are connected back to the inputs