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CS 758: Programming Multicore Processors (Fall 2016 Section 1 of 1)
Instructor: David A. Wood; URL: http://www.cs.wisc.edu/~david
''The distant threat has come to pass. For 30 years or more, pundits have claimed that parallel computers are the inexorable next step in the evolution of computers. --Jim Larus & Ravi Rajwar, Transactional Memory, Morgan & Claypool, Editor Mark Hill, 2007''
The hardware is here: Multicore processors multiplying two ways: in market share and cores per chip. Mainstream vendors are shipping chips with 4, 8, and 16 cores, often with multithreading support. More aggressive chips target 48 to 336 non-traditional cores.
But what of the software: Few people have any real experience programming multiprocessor systems. Furthermore, shared-memory parallel programming is a "known hard problem," due to deadlocks, data races, priority inversions, etc. Are there new programming languages, models, and/or libraries that can make this easier? What do application programmers need (that computer architects can provide) to make parallel programming easier?
The goal is to bring together a diverse group of students who are interested in learning about and perhaps advancing the state-of-the-art in programming multicore processors. Students will teach themselves with some guidance from the instructor who is a computer architecture, not programming, expert. The benefits students derive from this course will be greatly effected by their own initiative.
During the first half of the semester, we will study and write programs using OpenMP, P-threads, Cilk++, TBB, and GPU-based CUDA. For the second half of the semester, students will work in small groups on a substantial project. Platforms will include a 48-core Cavium ThunderX and a 72-core Intel Xeon Phi.
Prospective students should have ONE of the following:
Working knowledge of C++ is a requirement.
Note that the official prerequisites for CS 758 (i.e., CS/ECE 752 and CS/ECE 757) are not required.
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