My research interests lie in the intersection of computer architecture, compilers, runtime systems, and application analysis/optimization. My dissertation work with Professor Karu Sankaralingam focuses on leveraging idempotence for recovery at the architecture, compiler, and application levels.
M. de Kruijf, K. Sankaralingam, and S. Jha
Static Analysis and Compiler Design for Idempotent Processing.
PLDI '12: Programming Language Design and Implementation, June 2012.
M. de Kruijf, and K. Sankaralingam
Idempotent Processor Architecture.
(Slides)
MICRO '11: International Symposium on Microarchitecture, December 2011.
S. Nomura, M. Sinclair, C. Ho, V. Govindaraju, M. de Kruijf,
K. Sankaralingam
Sampling + DMR: Practical and Low-overhead Permanent Fault
Detection.
ISCA '11: International Symposium on Computer Architecture, June 2011.
A. Kumar, L. De Carli, S. J. Kim, M. de Kruijf,
K. Sankaralingam, C. Estan, and S. Jha.
Design and Implementation of the PLUG Architecture for
Programmable and Efficient Network Lookups.
PACT '10: International Conference on Parallel Architectures and
Compilation Techniques, September 2010.
M. de Kruijf, S. Nomura, and K.Sankaralingam.
Relax: An Architectural Framework for Software Recovery of
Hardware Faults.
(Slides)
ISCA '10: International Symposium on Computer Architecture, June 2010.
M. de Kruijf, S. Nomura, and K.Sankaralingam.
A Unified Model for Timing Speculation: Evaluating the Impact
of Technology Scaling, CMOS Design Style, and Fault Recovery
Mechanism.
(Slides)
DSN '10: International Conference on Dependable Systems and Networks, June 2010.
M. de Kruijf and K. Sankaralingam.
MapReduce for the CELL B.E. Architecture.
IBM Journal of Research and Development 53:5, 2009.
M. de Kruijf, K. Sankaralingam, S. Jha
Compiler Construction of Idempotent Regions.
University of Wisconsin Computer Sciences Technical Report CS-TR-2010-1700,
October 2011.
M. de Kruijf, S. Nomura, and K. Sankaralingam.
The Design, Modeling, and Evaluation of the Relax Architectural
Framework.
University of Wisconsin Computer Sciences Technical Report CS-TR-2010-1672,
April 2010.
M. de Kruijf and K.Sankaralingam.
Exploring the Synergy of Emerging Workloads and Silicon
Reliability Trends.
SELSE '09: IEEE Workshop on Silicon Errors in Logic –
System Effects, March 2009.
M. de Kruijf and K. Sankaralingam.
MapReduce for the Cell B.E. Architecture.
University of Wisconsin Computer Sciences Technical Report CS-TR-2007-1625,
October 2007.
Talk: ppt