UNIVERSITY OF WISCONSIN-MADISON
Computer Sciences Department
CS 537
Spring 2000
A. Arpaci-Dusseau
Quiz #7: Wednesday, April 5

Name: Student ID #:

Memory Management: Segmentation and Paging

Problem 1: Address Translations (30 points)

Consider the following structure for a logical address and the given contents for the segment table and page tables.

Logical Addr

Segment Table Page Table
Translate the following logical addresses to 24-bit physical addresses (briefly describe any errors).

a) Read 0x002070

b) Write 0x201016

c) Read 0x204014

d) Read 0x101c84

e) Read 0x005fd4

f) Write 0x002424

Problem 2: Implications of Address Format (40 points)

Given a logical address with the following format:

Logical Addr

calculate the following properties of the memory system. You should give your answer both in terms of a power or 2 (e.g., 2^15 bytes) and written out in terms of KB or MB (e.g., 32KB).

a) Number of segments

b) Maximum size of each segment

c) Size of each page

d) Maximum number of pages per segment

e) Maximum size of each page table (per segment).
Assume each page table entry (PTE) requires 4 bytes.



Problem 3: Paging Page Tables (30 points)

For this problem, assume that you have the same logical address format as Problem 2.

Imagine that you are building a memory management system in which you want each page table to fit within a single page in physical memory. As you know, this requires multiple levels of page tables.

a) Show how you would divide the logical address such that each page table fits on a page. Please show any necessary calculations.

 









b) With this new structure, how many memory references are needed to translate a logical address to a physical address? (Assume that there is no Translation Lookaside Buffer.) Briefly explain each memory reference.