; Disassembly of diag2_1.bin ; Disassembled Thu Feb 14 16:58:52 2002 ; Using DiStella v2.0 ; ; Command Line: C:\ATARI\DISTELLA\DISTELLA.EXE -pafs diag2_1.bin ; ; **************** ; * Error codes: * ; **************** ; ; $02 - RAM $0480 - $04FF error ; $03 - Diagnostic cart is running on a 2600 (cannot store to $2000) ; $04 - Status flags or stack error ; $11 - RAM $0140 - $01FF error ; $12 - RAM $0040 - $00FF error ; ; Unknowns: LE0AB? processor 6502 ; Address equates LE018 = $E018 ;7800 equates INPTCTRL EQU $01 BACKGRND EQU $20 P0C1 EQU $21 P0C2 EQU $22 P0C3 EQU $23 WSYNC EQU $24 P1C1 EQU $25 P1C2 EQU $26 P1C3 EQU $27 MSTAT EQU $28 P2C1 EQU $29 P2C2 EQU $2A P2C3 EQU $2B DPPH EQU $2C P3C1 EQU $2D P3C2 EQU $2E P3C3 EQU $2F DPPL EQU $30 P4C1 EQU $31 P4C2 EQU $32 P4C3 EQU $33 CHBASE EQU $34 P5C1 EQU $35 P5C2 EQU $36 P5C3 EQU $37 P6C1 EQU $39 P6C2 EQU $3A P6C3 EQU $3B CTRL EQU $3C P7C1 EQU $3D P7C2 EQU $3E P7C3 EQU $3F SWCHB EQU $0282 ; Other equates DLI_ADDR_LSB EQU $8C DLI_ADDR_MSB EQU $8D POWER_DOWN_LO_COUNTER EQU $93 POWER_DOWN_HI_COUNTER EQU $94 LF026 EQU $F026 ;######## ; Macros ;######## mac ErrorCode LDY #${1} JMP LF026 endm mac SetUpDLVector LDA #<${1} ;2 ; On Next interrupt, we'll go to E7DD STA DLI_ADDR_LSB ;3 LDA #>${1} ;2 STA DLI_ADDR_MSB ;3 endm ;##################### seg.u RAMdata ;##################### ORG $0484 ; Oddly enough, this is copied from lines E67D - E6C8. ; This code is believed to... LDA #$02 ;2 STA $03 ;3 ; RSYNC? LDA $FFF9 ;4 TAY ;2 AND #$0F ;2 CMP #$07 ;2 BNE L04AC ;2 TYA ;2 AND #$F0 ;2 CMP #$40 ;2 BCC L04AC ;2 STA $81 ;3 LDA #$00 ;2 STA $80 ;3 STA $0481 ;4 STA $0480 ;4 TAY ;2 JSR $04B3 ;6 JMP $04AE ;3 L04AC: LDA #$01 ;2 LDY #$06 ;2 STY $03 ;3 ; RSYNC? RTS ;6 L04B3: EOR ($80),Y ;5 TAX ;2 LDA $0480 ;4 CLC ;2 ADC ($80),Y ;5 STA $0480 ;4 LDA $0481 ;4 ADC #$00 ;2 STA $0481 ;4 TXA ;2 INY ;2 BNE L04B3 ;2 INC $81 ;5 BNE L04B3 ;2 RTS ;6 ;##################### seg code ;##################### ;############################### ORG $E000 LE000: LDX #$FF ;2 TXS ;2 STACK to $FF INX ;2 TXA ;2 LDX #$40 ;2 LE007: STA $00,X ;4 Clear out RAM $0040 - $00FF STA $0100,X ;5 Clear out RAM $0140 - $01FF INX ;2 BNE LE007 ;2 LDX #$80 ;2 LE011: STA $0400,X ;5 Clear out PIA RAM $0480 - $04FF INX ;2 BNE LE011 ;2 BEQ LE033 ;2 Jump to LE033 LE019: dc.b $00 dc.b $FF dc.b $CC dc.b $33 dc.b $99 dc.b $66 dc.b $0F dc.b $F0 dc.b $AA dc.b $55 dc.b $00 LE024: ErrorCode 12 ; Error in RAM $0040-$00FF LE029: ErrorCode 11 ; Error in RAM $0140-$01FF LE02E: ErrorCode 2 ; Error in RAM $0480-$04FF LE033: LDX #$0B ;2 11 vectors to try. First one is $00 (11th item in vector) LE035: DEX ;2 BEQ LE093 ;2 If $0040,$0140,$0f80 RAM tests pass, move on LDY #$40 ;2 LE03A: LDA.wy $0000,Y ;4 Does current item in $0040-$00FF CMP LE019,X ;4 match the vector? BNE LE024 ;2 If no, then branch to error setup LDA $0100,Y ;4 Does current item in $0140-$01FF CMP LE019,X ;4 match the vector? BNE LE029 ;2 If no, then branch to error setup CPY #$80 ;2 BCC LE056 ;2 If < $0480, we're not interested... LDA $0400,Y ;4 Does current item in $0480-$04FF CMP LE019,X ;4 match the vector? BNE LE02E ;2 If no, then branch to error setup LE056: LDA LE018,X ;4 Get next item in vector to try (previous address in table) STA.wy $0000,Y ;5 Store current item in $0040-$00FF CMP.wy $0000,Y ;4 Does item immediately store in $0040-$00FF? BNE LE024 ;2 If no, then branch to error setup STA $0100,Y ;5 Store current item in $0140-$01FF CMP $0100,Y ;4 Does item immediately store in $0140-$01FF? BNE LE029 ;2 If no, then branch to error setup CPY #$80 ;2 If < $0480, we're not interested... BCC LE075 ;2 STA $0400,Y ;5 Store current item in $0480-$04FF CMP $0400,Y ;4 Does item immediately store in $0480-$04FF? BNE LE02E ;2 If no, then branch to error setup LE075: INY ;2 set up next RAM address index BNE LE03A ;2 Go until all RAM addresses have verified a vector LDA #$26 ;2 waste 25 * 256 scanlines = approx 25/60 second LDY #$00 ;2 LE07C: STA WSYNC ;3 DEY ;2 BNE LE07C ;2 SEC ;2 SBC #$01 ;2 BNE LE07C ;2 BEQ LE035 ;2 ; go back through the RAM-check loop again. LDY #$04 ;2 ; if Zero flag is not working JMP LE08F ;3 LE08D: LDY #$04 ;2 ; if status flags not working properly LE08F: SEI ;2 JMP $F026 ;3 LE093: LDX #$FF ;2 TXS ;2 LDA #$88 ;2 STA $8E ;3 LDA #$E0 ;2 STA $8F ;3 LDA #$8D ;2 STA DLI_ADDR_LSB ;3 LDA #$E0 ;2 STA DLI_ADDR_MSB ;3 JMP LE0B6 ;3 LE0A9: dc.b $FF ; Used as an address for BIT testing LE0AA: dc.b $00 ; Used as an address for BIT testing dc.b $80 ; ????? LE0AC: LDA #$30 ;2 ; if status flags not working properly STA CTRL ;3 SEI ;2 ErrorCode 4 LE0B6: ; ****************************** ; Load Status flags via LDA $#00 ; ****************************** LDA #$00 ;2 BNE LE0AC ;2 ; Is Zero flag not working (cleared)? BMI LE0AC ;2 ; Is Sign flag not working (set)? ; ****************************** ; Load Status flags via LDA $#AA ; ****************************** LDA #$AA ;2 BPL LE0AC ;2 ; Is Sign flag not working (cleared)? BEQ LE0AC ;2 ; Is Zero flag not working (set)? ; ************************* ; Load Status flags via PLP ; ************************* PHA ;3 ; Push #$AA onto stack PLP ;4 ; Pull #$AA off of stack ; Status = 10101010 ; Status = NV_BDIZC NOP ;2 BPL LE0AC ;2 ; Is Sign flag not working (cleared)? BVS LE0AC ;2 ; Is Overflow flag not working (set)? BNE LE0AC ;2 ; Is Zero flag not working (cleared)? BCS LE0AC ;2 ; Is Carry flag not working (set)? ; *************************** ; Load Status flags via AND # ; *************************** PHP ;3 ; Push #$AA (status flags) onto stack LDA #$FF ;2 ; A<-#$FF PLA ;4 ; A<-#$AA (from stack) AND #$CF ;2 ; A<-#$8A ; Status = 10001010 ; Status = NV_BDIZC BEQ LE0AC ;2 ; Is Zero flag not working (cleared)? BPL LE0AC ;2 ; Is Sign flag not working (cleared)? ; *************************** ; Load Status flags via CMP # ; *************************** CMP #$8A ;2 ; Do a compare to set the flags (compare $8A with $8A) BNE LE0AC ;2 ; Is Zero flag not working (set)? BCC LE0AC ;2 ; Is Carry flag not working (cleared)? PHP ;3 PLA ;4 AND #$10 ;2 LDA #$55 ;2 PHA ;3 PLP ;4 NOP ;2 BMI LE0AC ;2 ; Is Sign flag not working (set)? BVC LE0AC ;2 ; Is Overflow flag not working (cleared)? BEQ LE0AC ;2 ; Is Zero flag not working (set)? BCC LE0AC ;2 ; Is Carry flag not working (cleared)? PHP ;3 LDA #$00 ;2 PLA ;4 AND #$CF ;2 BMI LE0AC ;2 CMP #$45 ;2 BNE LE0AC ;2 LDA #$AA ;2 PHA ;3 PLP ;4 BMI LE103 ;2 LE100: JMP LE0AC ;3 LE103: BVC LE108 ;2 JMP LE0AC ;3 LE108: BEQ LE10D ;2 JMP LE0AC ;3 LE10D: BCC LE112 ;2 JMP LE0AC ;3 LE112: LDA #$5D ;2 PHA ;3 PLP ;4 BPL LE11B ;2 JMP LE0AC ;3 LE11B: BVS LE120 ;2 JMP LE0AC ;3 LE120: BNE LE125 ;2 JMP LE0AC ;3 LE125: BCS LE12D ;2 JMP LE0AC ;3 LE12A: JMP LE0AC ;3 LE12D: LDA #$FF ;2 PHA ;3 PLP ;4 CLC ;2 BCS LE12A ;2 CLV ;2 BVS LE12A ;2 SEC ;2 BCC LE12A ;2 BIT LE0AA ;4 BNE LE12A ;2 CLD ;2 CLI ;2 PHP ;3 PLA ;4 AND #$CC ;2 BNE LE12A ;2 LDA #$C0 ;2 BIT LE0A9 ;4 BEQ LE12A ;2 SED ;2 SEI ;2 PHP ;3 PLA ;4 AND #$CC ;2 EOR #$CC ;2 BNE LE12A ;2 BPL LE15D ;2 LE15A: JMP LE0AC ;3 LE15D: LDY #$55 ;2 BEQ LE15A ;2 BMI LE15A ;2 STY $01AA ;4 CPY $01AA ;4 BNE LE15A ;2 CPY #$55 ;2 BNE LE15A ;2 BCC LE15A ;2 BMI LE15A ;2 CPY #$56 ;2 BCS LE15A ;2 BEQ LE15A ;2 BPL LE15A ;2 LDA #$AA ;2 CMP #$AB ;2 BCS LE15A ;2 BEQ LE15A ;2 BPL LE15A ;2 LDX #$AA ;2 BEQ LE15A ;2 BPL LE15A ;2 STX $0155 ;4 CPX $0155 ;4 BNE LE15A ;2 CMP $0155 ;4 BNE LE15A ;2 CPX #$AB ;2 BPL LE15A ;2 BCS LE15A ;2 BEQ LE15A ;2 CPX #$AA ;2 BMI LE15A ;2 BNE LE15A ;2 BCC LE15A ;2 TXS ;2 BNE LE1EC ;2 TYA ;2 BEQ LE1EC ;2 BMI LE1EC ;2 BIT LE0A9 ;4 TAX ;2 BMI LE1EC ;2 BIT LE0A9 ;4 TXS ;2 BPL LE1EC ;2 LDX #$AA ;2 TSX ;2 BMI LE1EC ;2 CPX #$55 ;2 BNE LE1EC ;2 PHA ;3 LDA $0155 ;4 CMP #$55 ;2 BNE LE1EC ;2 TSX ;2 CPX #$54 ;2 BNE LE1EC ;2 LDA #$AA ;2 PLA ;4 CMP #$55 ;2 BNE LE1EC ;2 TSX ;2 CPX #$55 ;2 BNE LE1EC ;2 LDA #$AA ;2 TXA ;2 BMI LE1EC ;2 LDY #$AA ;2 TAY ;2 BMI LE1EC ;2 CPY #$55 ;2 BEQ LE1EF ;2 LE1EC: JMP LE0AC ;3 LE1EF: LDY #$AA ;2 BPL LE1EC ;2 CPY #$AA ;2 BNE LE1EC ;2 BCC LE1EC ;2 LDA $01AA ;4 BMI LE1EC ;2 CMP $01AA ;4 BNE LE1EC ;2 LDX $01AA ;4 BMI LE1EC ;2 CPX $01AA ;4 BNE LE1EC ;2 TYA ;2 BPL LE1EC ;2 BEQ LE1EC ;2 CMP #$AA ;2 BNE LE1EC ;2 TAX ;2 BPL LE1EC ;2 BEQ LE1EC ;2 CPX #$AA ;2 BNE LE1EC ;2 TXS ;2 PHA ;3 LDA $01AA ;4 CMP #$AA ;2 BNE LE1EC ;2 TSX ;2 CPX #$A9 ;2 BNE LE1EC ;2 LDA #$55 ;2 PLA ;4 CMP #$AA ;2 BNE LE1EC ;2 TSX ;2 CPX #$AA ;2 BNE LE1EC ;2 LDA #$55 ;2 TXA ;2 BPL LE1EC ;2 BEQ LE1EC ;2 CMP #$AA ;2 BNE LE1EC ;2 TAY ;2 BPL LE1EC ;2 BEQ LE1EC ;2 CPY #$AA ;2 BEQ LE250 ;2 LE24D: JMP LE0AC ;3 LE250: LDX #$FF ;2 TXS ;2 SEC ;2 LDA $0155 ;4 ADC $01AA ;4 BCC LE24D ;2 BNE LE24D ;2 BMI LE24D ;2 BVS LE24D ;2 CMP #$66 ;2 BNE LE24D ;2 SBC $01AA ;4 BCS LE24D ;2 BPL LE24D ;2 BEQ LE24D ;2 BVC LE24D ;2 LDA #$40 ;2 CLC ;2 ADC #$40 ;2 BCS LE24D ;2 BVC LE24D ;2 BPL LE24D ;2 BEQ LE24D ;2 CMP #$80 ;2 BNE LE24D ;2 SEC ;2 SBC #$40 ;2 BCC LE24D ;2 BVC LE24D ;2 BMI LE24D ;2 BEQ LE24D ;2 BCC LE24D ;2 CMP #$40 ;2 BNE LE24D ;2 CLD ;2 CLC ;2 LDA #$55 ;2 ADC #$55 ;2 BCS LE24D ;2 CMP #$AA ;2 BNE LE24D ;2 SEC ;2 SBC #$55 ;2 BCC LE24D ;2 CMP #$55 ;2 BNE LE24D ;2 SBC #$56 ;2 BCS LE24D ;2 CMP #$FF ;2 BNE LE24D ;2 SED ;2 LDX #$FF ;2 INX ;2 BNE LE24D ;2 DEX ;2 BEQ LE24D ;2 BPL LE24D ;2 CPX #$FF ;2 BNE LE24D ;2 LDY #$FF ;2 INY ;2 BNE LE24D ;2 DEY ;2 BEQ LE24D ;2 BPL LE24D ;2 CPY #$FF ;2 BEQ LE2D0 ;2 LE2CD: JMP LE0AC ;3 LE2D0: LDA #$AA ;2 SEC ;2 LSR ;2 BCS LE2CD ;2 BMI LE2CD ;2 CMP #$55 ;2 BNE LE2CD ;2 ASL ;2 BCS LE2CD ;2 BPL LE2CD ;2 CMP #$AA ;2 ASL ;2 BCC LE2CD ;2 BMI LE2CD ;2 CMP #$54 ;2 BNE LE2CD ;2 LSR ;2 BCS LE2CD ;2 BMI LE2CD ;2 CMP #$2A ;2 BNE LE2CD ;2 LDA #$80 ;2 CLC ;2 ROL ;2 BCC LE2CD ;2 CMP #$00 ;2 ROL ;2 BCS LE2CD ;2 CMP #$01 ;2 BNE LE2CD ;2 CLC ;2 ROR ;2 BCC LE2CD ;2 CMP #$00 ;2 BNE LE2CD ;2 ROR ;2 BCS LE2CD ;2 CMP #$80 ;2 BNE LE2CD ;2 LDA #$AA ;2 STA $84 ;3 LDA #$55 ;2 STA $85 ;3 ORA $84 ;3 BPL LE2CD ;2 CMP #$FF ;2 BNE LE2CD ;2 AND $85 ;3 BMI LE2CD ;2 BEQ LE2CD ;2 CMP #$55 ;2 BNE LE2CD ;2 EOR $84 ;3 BPL LE2CD ;2 EOR #$FF ;2 BNE LE2CD ;2 EOR $85 ;3 CMP #$55 ;2 BNE LE2CD ;2 AND #$FF ;2 CMP #$55 ;2 BNE LE2CD ;2 LDA #$AA ;2 ORA $85 ;3 CMP #$FF ;2 BEQ LE34C ;2 LE349: JMP LE0AC ;3 LE34C: LDA #$FF ;2 LDY #$00 ;2 STA $84 ;3 INC $84 ;5 BNE LE349 ;2 CPY $84 ;3 BNE LE349 ;2 DEC $84 ;5 BPL LE349 ;2 BEQ LE349 ;2 CMP $84 ;3 BNE LE349 ;2 LDA #$AA ;2 LDX #$01 ;2 STA $84,X ;4 LDY $84,X ;4 CLC ;2 ROL $84,X ;6 BCC LE349 ;2 ROR $85 ;5 BCS LE349 ;2 CPY #$AA ;2 BNE LE349 ;2 CMP $84,X ;4 BNE LE349 ;2 LDY #$55 ;2 STY $84,X ;4 LDA #$AA ;2 LDY #$01 ;2 STA.wy $0084,Y ;5 CMP $85 ;3 BNE LE349 ;2 LDX #$55 ;2 STX $85 ;3 LDA #$AA ;2 STA $0100,X ;5 LDY $0100,X ;4 CPY #$AA ;2 BNE LE349 ;2 LDA #$55 ;2 STA $0155 ;4 STA $2F,X ;4 CMP $84 ;3 BNE LE349 ;2 CMP $2F,X ;4 BNE LE349 ;2 LDA #$AA ;2 STA $84 ;3 TAY ;2 LDA #$55 ;2 STA $0100,Y ;5 LDX $0100,Y ;4 CPX #$55 ;2 BNE LE3D3 ;2 LDA #$AA ;2 STA $01AA ;4 STA $FFDB,Y ;5 CMP $85 ;3 BNE LE3D3 ;2 CMP $FFDB,Y ;4 BNE LE3D3 ;2 LDA #$55 ;2 STA $85 ;3 BNE LE3D6 ;2 LE3D3: JMP LE0AC ;3 LE3D6: LDA #$84 ;2 STA $86 ;3 LDA #$00 ;2 STA $87 ;3 LDA #$85 ;2 STA $88 ;3 LDA #$00 ;2 STA $89 ;3 LDX #$00 ;2 LDA #$55 ;2 LDA ($86,X) ;6 INX ;2 INX ;2 EOR ($86,X) ;6 CMP #$FF ;2 BNE LE3D3 ;2 STA ($86,X) ;6 CMP $85 ;3 BNE LE3D3 ;2 CMP ($86,X) ;6 BNE LE3D3 ;2 LDA #$55 ;2 STA $85 ;3 LDY #$00 ;2 LDA #$55 ;2 LDA ($86),Y ;5 INY ;2 EOR ($86),Y ;5 CMP #$FF ;2 BNE LE3D3 ;2 STA ($86),Y ;6 CMP ($86),Y ;5 BNE LE3D3 ;2 LDA #$AB ;2 STA $86 ;3 LDA #$00 ;2 STA $87 ;3 LDY #$FF ;2 LDA #$55 ;2 STA ($86),Y ;6 CMP $01AA ;4 BNE LE3D3 ;2 CMP ($86),Y ;5 BNE LE3D3 ;2 LDA #$50 ;2 STA $84 ;3 LDA #$E4 ;2 STA $85 ;3 JMP.ind ($0084);5 Should jump to $E450 LE437: JMP $E3D3 LE43A: TSX ;2 CPX #$FD ;2 BNE LE453 ;2 PLA ;4 Pull off old return address LSB CMP #$52 ;2 It should be $52 BNE LE453 ;2 PLA ;4 Pull off old return address MSB CMP #$E4 ;2 It should be $E4; therefore originally returning to $E452+1 = $E453 BNE LE453 ;2 LDA #$E4 ;2 Push $E4 MSB Address PHA ;3 LDA #$67 ;2 Push $67 LSB Address PHA ;3 RTS ;6 This should take us to $E467+1 = $E468 LE450: JSR LE43A ;6 Go to subroutine at $E43A LE453: JMP LE0AC ;3 LE456: CMP #$99 ;2 BNE LE453 ;2 TSX ;2 CPX #$FC ;2 BNE LE453 ;2 PLA ;4 PHA ;3 AND #$10 ;2 BEQ LE453 ;2 LDA #$66 ;2 RTI ;6 LE468: TSX ;2 CPX #$FF ;2 BNE LE453 ;2 LDA #$56 ;2 STA $8E ;3 LDA #$E4 ;2 STA $8F ;3 LDA #$99 ;2 BRK ;7 ; go to BRK Vector ($FFFE points to $$FE51) ; - the code there is an indirect jump to $8E ; which is a direct jump to $E456. ; That subroutine then returns (RTI) from this break, ; taking the Program counter to the next line: NOP ;2 BPL LE453 ;2 CMP #$66 ;2 BNE LE453 ;2 BEQ LE494 ;2 LE481: dc.b $00 dc.b $01 dc.b $02 dc.b $03 dc.b $04 dc.b $05 dc.b $06 dc.b $07 dc.b $08 dc.b $09 dc.b $10 dc.b $20 dc.b $30 dc.b $40 dc.b $50 dc.b $60 dc.b $70 dc.b $80 dc.b $90 ;****************** ; * BCD Math test * ;****************** LE494: LDA #$00 TAX LE497: CMP LE481,X ;4 BNE LE4BE ;2 ; Zero flag test: also verifies BCD math CPX #$0A ;2 BPL LE4A6 ;2 ; Determine if MSNibble of entry is populated CLC ;2 ; If doing LSNibble, add 1 ADC #$01 ;2 JMP LE4A9 ;3 LE4A6: CLC ;2 ; If doing MSNibble, add 10 ADC #$0A ;2 ; Note that we are in BCD math mode (set at $E2B0) LE4A9: INX ;2 CPX #$12 ;2 BNE LE497 ;2 ADC #$09 ;2 ; Input: Acc = $90 ; Carry is set, so $90 + $9 + 1 in BCD = $100 -> $00 BCC LE4BE ;2 CMP #$00 ;2 BNE LE4BE ;2 SBC #$01 ;2 BCS LE4BE ;2 CLD ;2 SEI ;2 BCC LE4C1 ;2 LE4BE: JMP LE0AC ;3 ;**************************** ;* Clear out Big RAM chunks * ;**************************** LE4C1: LDX #$00 ;2 TXA ;2 LE4C4: STA $1800,X ;5 STA $1900,X ;5 STA $1A00,X ;5 STA $1B00,X ;5 STA $1C00,X ;5 STA $1D00,X ;5 STA $1E00,X ;5 STA $1F00,X ;5 STA $2000,X ;5 STA $2100,X ;5 STA $2200,X ;5 STA $2300,X ;5 STA $2400,X ;5 STA $2500,X ;5 STA $2600,X ;5 STA $2700,X ;5 INX ;2 BNE LE4C4 ;2 BEQ LE511 ;2 ;********************************* ; RAM INTEGRITY ANALYSIS ROUTINE * ; you should only end up here if * ; there was a RAM error !!! * ;********************************* LE4F9: LDA $81 ;3 ; Get MSB pointer which was used for indirect addressing. ; Then, we do a series of comparisons with it. ; Since, in the code below (starting at LE511), ; we're testing the integrity of $1800 - $27FF) by using an indirect ; load of address $80+$81 (little-endian), we're seeing if the ; error exists in $80/$81, or in the $1800-$17FF range. ; In theory, $81 should be limited to the range: ; $18 < X < $1F, $20 < X < $27. ; However, this module tests these conditions: ; ; if #1F - $81 sets MSBit, then N = set, else cleared ; if ; if X < $1F, then Error 12 ; if X < $18, then Error 12 (this'll obviously be dead code) ; if X > $27, then Error 12 ; Else, error 11 LDY #$12 ;2 ; Error for RAM $0040 - $00FF error condition code CMP #$1F ;2 BMI LE50B ;2 CMP #$18 ;2 ; dead branch condition, previous CMP will overtake BMI LE50B ;2 ; dead branch condition, previous CMP will overtake CMP #$27 ;2 BPL LE50B ;2 ;****************** ;****************** ; Error for RAM $0140 - $01FF error LDY #$11 ;2 LE50B: JMP $F026 ;3 ;****************** ;****************** LE50E: JMP LE4F9 ;3 ;****************** ;*********************************** ; $1800-$1FFF, $2200-$27FF memory test ; using indirect addressing ;*********************************** LE511: LDX #$0B ;2 ; 11 vectors to try. First one is $00 (11th item in vector) LE513: DEX ;2 BEQ LE544 ;2 ; Take this exit for this memory-integrity analysis routine. LDY #$18 ;2 ; We'll start checking at $1800. STY $81 ;3 LDY #$84 ;2 LE51C: LDA ($80),Y ;5 ; I believe at this point that $80 is still zero ; (from being cleared out before) ; Therefore, with $81 defined just 2 instructions prior to this code, ; it looks like we're indirectly loading $1800 at first. ; Here's the breakdown of this instruction: ; - Loads $80+$81 in little-endian format. This is $1800 ; - Since indirect, load the data at $1800. This is $00 ; - Add offset Y, which is $84. So, now we're loading the data stored at ; zero-page address $0084 CMP LE019,X ;4 ; compare to vector (initially set to zero) BNE LE50E ;2 ; memory problem-analysis routine; is integrity compromised in zero page memory ; or in higher pages indirectly addressed (i.e. $1800+) LDA LE018,X ;4 ; Load previous item in vector-list for storage. STA ($80),Y ;6 ; Store indirectly (first time through is storing at $0084) CMP ($80),Y ;5 ; compare to itself (checks the memory persistance) BNE LE50E ;2 ; if not equal to itself, diagnose problem with memory problem analysis routine. INY ;2 ; Increment nested pointer (now we'll try storing at $0085 indirectly). BNE LE51C ;2 ; if Y = 00, then we've passed out of zero-page memory, and are back at $0000. INC $81 ;5 ; So increment outside pointer (change from $1800 to $1900, etc...) LDA $81 ;3 CMP #$20 ;2 ; see if we're at $2000 yet ; note that this routine checks from $1800-$1FFF, hits ; the $2000 boundary, so it resets to $2200, ; and finally we check from $2200 - $27FF, and when ; $2800 is hit, we loop through with a different item in the vector ; table, resetting us to $1800. BNE LE53D ;2 LDA #$22 ;2 STA $81 ;3 BNE LE51C ;2 LE53D: CMP #$28 ;2 BNE LE51C ;2 JMP LE513 ;3 ; Loop for the next item in the vector table! ;*********************************** LE544: LDA #$01 ;2 STA $82 ;3 CLV ;2 BVC LE54E ;2 LE54B: JMP LE4F9 ;3 LE54E: LDY #$18 ;2 STY $81 ;3 LDY #$84 ;2 LDA $82 ;3 LE556: STA ($80),Y ;6 CMP ($80),Y ;5 BNE LE54B ;2 BVC LE566 ;2 SEC ;2 ROL ;2 BCS LE56C ;2 LDA #$FE ;2 BNE LE56C ;2 LE566: CLC ;2 ROL ;2 BCC LE56C ;2 LDA #$01 ;2 LE56C: INY ;2 BNE LE556 ;2 INC $81 ;5 LDX $81 ;3 CPX #$20 ;2 BNE LE57D ;2 LDX #$22 ;2 STX $81 ;3 BNE LE556 ;2 LE57D: CPX #$28 ;2 BNE LE556 ;2 BEQ LE586 ;2 LE583: JMP LE4F9 ;3 LE586: LDY #$18 ;2 STY $81 ;3 LDY #$84 ;2 LDA $82 ;3 LE58E: CMP ($80),Y ;5 BNE LE583 ;2 BVC LE59C ;2 SEC ;2 ROL ;2 BCS LE5A2 ;2 LDA #$FE ;2 BNE LE5A2 ;2 LE59C: CLC ;2 ROL ;2 BCC LE5A2 ;2 LDA #$01 ;2 LE5A2: INY ;2 BNE LE58E ;2 INC $81 ;5 LDX $81 ;3 CPX #$20 ;2 BNE LE5B3 ;2 LDX #$22 ;2 STX $81 ;3 BNE LE58E ;2 LE5B3: CPX #$28 ;2 BNE LE58E ;2 BVC LE5C0 ;2 SEC ;2 ROL $82 ;5 BCC LE5D1 ;2 BCS LE5CE ;2 LE5C0: CLC ;2 ROL $82 ;5 BCS LE5C7 ;2 BCC LE5CE ;2 LE5C7: BIT LE0A9 ;4 LDA #$FE ;2 STA $82 ;3 LE5CE: JMP LE54E ;3 LE5D1: LDA #$00 ;2 STA $82 ;3 LE5D5: LDA #$03 ;2 STA $83 ;3 BNE LE5DE ;2 LE5DB: JMP LE4F9 ;3 LE5DE: LDY #$18 ;2 STY $81 ;3 LDY #$84 ;2 LDX $83 ;3 LE5E6: LDA $82 ;3 LE5E8: DEX ;2 BNE LE5FA ;2 LDX #$03 ;2 EOR #$FF ;2 STA ($80),Y ;6 CMP ($80),Y ;5 BNE LE5DB ;2 EOR #$FF ;2 JMP LE600 ;3 LE5FA: STA ($80),Y ;6 CMP ($80),Y ;5 BNE LE5DB ;2 LE600: INY ;2 BNE LE5E8 ;2 INC $81 ;5 LDA $81 ;3 CMP #$20 ;2 BNE LE611 ;2 LDA #$22 ;2 STA $81 ;3 BNE LE5E6 ;2 LE611: CMP #$28 ;2 BNE LE5E6 ;2 BEQ LE61A ;2 LE617: JMP LE4F9 ;3 LE61A: LDY #$18 ;2 STY $81 ;3 LDY #$84 ;2 LDX $83 ;3 LE622: LDA $82 ;3 LE624: DEX ;2 BNE LE634 ;2 LDX #$03 ;2 EOR #$FF ;2 CMP ($80),Y ;5 BNE LE617 ;2 EOR #$FF ;2 JMP LE638 ;3 LE634: CMP ($80),Y ;5 BNE LE617 ;2 LE638: INY ;2 BNE LE624 ;2 INC $81 ;5 LDA $81 ;3 CMP #$20 ;2 BNE LE649 ;2 LDA #$22 ;2 STA $81 ;3 BNE LE622 ;2 LE649: CMP #$28 ;2 BNE LE622 ;2 DEC $83 ;5 BEQ LE654 ;2 JMP LE5DE ;3 LE654: DEC $82 ;5 LDA $82 ;3 CMP #$FE ;2 BEQ LE65F ;2 JMP LE5D5 ;3 LE65F: JSR LE671 ;6 JSR $0484 ;6 TAY ;2 NOP ;2 BEQ LE66E ;2 ErrorCode 14 LE66E: JMP LE6DF ;3 ;****************************** ; Subroutine called from LE65F ; - it sets ;****************************** LE671: LDX #$4B ;2 LE673: LDA LE67D,X ;4 STA $0484,X ;5 DEX ;2 BPL LE673 ;2 RTS ;6 ;****************************** ; DATA copied to $0484, and later executed there (see $E671 code) LE67D: dc.b $A9,$02,$85,$03,$AD,$F9,$FF,$A8,$29,$0F,$C9,$07,$D0,$1A,$98,$29 dc.b $F0,$C9,$40,$90,$13,$85,$81,$A9,$00,$85,$80,$8D,$81,$04,$8D,$80 dc.b $04,$A8,$20,$B3,$04,$4C,$AE,$04,$A9,$01,$A0,$06,$84,$03,$60,$51 dc.b $80,$AA,$AD,$80,$04,$18,$71,$80,$8D,$80,$04,$AD,$81,$04,$69,$00 dc.b $8D,$81,$04,$8A,$C8,$D0,$E8,$E6,$81,$D0,$E4,$60 ;************************ ;* Subroutine: * ;************************ LE6C9: LDX #$00 ;2 LE6CB: BIT MSTAT ;3 BMI LE6D5 ;2 DEX ;2 BNE LE6CB ;2 DEY ;2 BNE LE6CB ;2 LE6D5: RTS ;6 ;************************ ;* Subroutine: MSTAT interity (timing tests) ;************************ LE6D6: BIT MSTAT ;3 BPL LE6DE ;2 DEY ;2 BNE LE6D6 ;2 DEY ;2 LE6DE: RTS ;6 LE6DF: LDY #$0B ;2 JSR LE6C9 ;6 BMI LE6E8 ;2 BPL LE6EF ;2 LE6E8: LDY #$F0 ;2 JSR LE6D6 ;6 BPL LE6F4 ;2 LE6EF: ErrorCode 13 LE6F4: JSR LE717 ;6 LDX #$F4 ;2 LE6F9: STA WSYNC ;3 DEX ;2 BNE LE6F9 ;2 BIT MSTAT ;3 LE700: BMI LE707 ;2 ErrorCode 13 LE707: JSR LE73B ;6 JSR LE728 ;6 JMP $F891 ;3 ;************************ ;* Subroutine: * ;* WaitVBlank: * ;************************ LE710: JSR LE71E ;6 JSR LE723 ;6 RTS ;6 ;************************ ;* Subroutine: * ;* WaitNotVBlank: * ;************************ LE717: JSR LE723 ;6 JSR LE71E ;6 RTS ;6 ;************************ ;* Subroutine: * ;* WaitVBOff: * ;************************ LE71E: BIT MSTAT ;3 BMI LE71E ;2 RTS ;6 ;************************ ;* Subroutine: * ;* WaitVBOn: * ;************************ LE723: BIT MSTAT ;3 If in 2600 mode, this is BIT INPT0 (a shadow of INPT0!) BPL LE723 ;2 This causes an infinite loop until the cap in the 2600 is charged. RTS ;6 This is accomplished by putting voltage into Controller 1, pin 5. ; The appropriate hardware to do this is a 47kOhm resistor tied ; from pin 5 to a common wire between pins 2 and four. ;********************** ;* Subroutine: * ;* * ;* Monitor switches: * ;* - Select * ;* - Color/B&W * ;* - Reset * ;* RTS if pressed and * ;* released, else * ;* loop * ;********************** LE728: LDA SWCHB ;4 AND #$0B ;2 EOR #$0B ;2 BEQ LE728 ;2 Loop until button (or combo) pressed LE731: LDA SWCHB ;4 AND #$0B ;2 EOR #$0B ;2 BNE LE731 ;2 Loop until all buttons released RTS ;6 ;***************** ;* Subroutine: * ;* * ;* Set up for * ;* actual screen * ;* output * ;***************** LE73B: LDX #$60 ;2 Disable DMA STX CTRL ;3 LDX #$00 ;2 LE741: LDA LE9E8,X ;4 STA $1800,X ;5 DLL at $1800 LDA LEA30,X ;4 STA $1A00,X ;5 DL's at $1A00 LDA LEAD9,X ;4 STA $1B00,X ;5 More DL's at $1B00 LDA LEB87,X ;4 STA $1900,X ;5 Character map at $1900 DEX ;2 BNE LE741 ;2 LDX #$00 ;2 STX DPPL ;3 LDX #$18 ;2 STX DPPH ;3 SetUpDLVector E780 LDA #$F2 ;2 STA $91 ;3 LDA #$20 ;2 STA $92 ;3 ; Set up power-down counter. Every 4 minutes and 35 seconds, ; the system will reset. The lo counter starts at zero, and ; increments each frame. When it hits zero (i.e. 256), the ; hi-counter increases. If the high counter hits zero, the ; system resets. So, 256 * (256-$C0) = 256 * 64 = 16384 frames ; 16384 frames / 60 seconds per frame = 273.0667 seconds. ; Take this divided by 60 seconds per minute, and you get 4.55 ; minutes (approximately 4 minutes, 35 seconds). LDA #$C0 ;2 STA POWER_DOWN_HI_COUNTER ;3 JSR LE710 ;6 LDA #$40 ;2 STA CTRL ;3 Normal DMA enabled RTS ;6 LE780: ;############################## ; 7800 DLI interrupt code ;############################## ; ; In E73B's subroutine, you can find the following code: ; ; LDA #$80 ;2 ; STA DLI_ADDR_LSB ;3 ; LDA #$E7 ;2 ; STA DLI_ADDR_MSB ;3 ; ; The interrupt vector jumps to LFE4E, which has the following code: ; ; JMP.ind ($008C);5 ; ; So, any DLI Interrupt will trigger execution of this code: ;############################## PHA ;3 LDA #$00 ;2 STA BACKGRND;3 LDA #$50 ;2 STA CTRL ;3 LDA #$2E ;2 STA P0C1 ;3 LDA #$0F ;2 STA P0C2 ;3 LDA #$3A ;2 STA P0C3 ;3 LDA #$7E ;2 STA P1C1 ;3 LDA #$8E ;2 STA P1C2 ;3 LDA #$9E ;2 STA P1C3 ;3 LDA #$AE ;2 STA P2C1 ;3 LDA #$BE ;2 STA P2C2 ;3 LDA #$00 ;2 STA P2C3 ;3 LDA #$A0 ;2 STA CHBASE ;3 SetUpDLVector E7BB PLA ;4 RTI ;6 LE7BB: PHA ;3 STA WSYNC ;3 LDA #$54 ;2 STA CTRL ;3 SetUpDLVector E7CC PLA ;4 RTI ;6 LE7CC: PHA ;3 STA WSYNC ;3 LDA #$50 ;2 STA CTRL ;3 SetUpDLVector E7DD PLA ;4 RTI ;6 LE7DD: PHA ;3 STA WSYNC ;3 LDA #$43 ;2 STA CTRL ;3 LDA #$9F ;2 STA CHBASE ;3 LDA #$DF ;2 STA P0C2 ;3 SetUpDLVector E7FC STA WSYNC ;3 LDA #$20 ;2 STA BACKGRND;3 PLA ;4 RTI ;6 LE7FC: PHA ;3 STA WSYNC ;3 STA WSYNC ;3 LDA #$00 ;2 STA BACKGRND;3 SetUpDLVector E80F PLA ;4 RTI ;6 LE80F: PHA ;3 TXA ;2 PHA ;3 STA WSYNC ;3 LDA #$34 ;2 STA P0C1 ;3 LDA #$0F ;2 STA P0C2 ;3 LDA #$88 ;2 STA P0C3 ;3 LDA #$DE ;2 STA P4C1 ;3 LDA #$56 ;2 STA CTRL ;3 LDA #$B8 ;2 STA CHBASE ;3 STA WSYNC ;3 LDX #$07 ;2 LDA $92 ;3 LE832: CLC ;2 ADC #$01 ;2 JSR LE9E0 ;6 STA WSYNC ;3 STA $1B9A ;4 DEX ;2 BPL LE832 ;2 SetUpDLVector E84C PLA ;4 TAX ;2 PLA ;4 RTI ;6 LE84C: PHA ;3 STA WSYNC ;3 SetUpDLVector E89B STA WSYNC ;3 LDA #$58 ;2 STA CTRL ;3 LDA #$1A ;2 STA P3C1 ;3 LDA #$2A ;2 STA P3C2 ;3 LDA #$3A ;2 STA P3C3 ;3 LDA #$4A ;2 STA P4C1 ;3 LDA #$5A ;2 STA P4C2 ;3 LDA #$6A ;2 STA P4C3 ;3 LDA #$7A ;2 STA P5C1 ;3 LDA #$8A ;2 STA P5C2 ;3 LDA #$9A ;2 STA P5C3 ;3 LDA #$AA ;2 STA P6C1 ;3 LDA #$BA ;2 STA P6C2 ;3 LDA #$CA ;2 STA P6C3 ;3 LDA #$DA ;2 STA P7C1 ;3 LDA #$EA ;2 STA P7C2 ;3 LDA #$FA ;2 STA P7C3 ;3 PLA ;4 RTI ;6 LE89B: PHA ;3 STA WSYNC ;3 STA WSYNC ;3 LDA #$10 ;2 STA BACKGRND;3 SetUpDLVector E8EE LDA #$0F ;2 STA P0C2 ;3 LDA #$00 ;2 STA P3C1 ;3 LDA #$01 ;2 STA P3C2 ;3 LDA #$02 ;2 STA P3C3 ;3 LDA #$03 ;2 STA P4C1 ;3 LDA #$04 ;2 STA P4C2 ;3 LDA #$05 ;2 STA P4C3 ;3 LDA #$06 ;2 STA P5C1 ;3 LDA #$07 ;2 STA P5C2 ;3 LDA #$08 ;2 STA P5C3 ;3 LDA #$09 ;2 STA P6C1 ;3 LDA #$0A ;2 STA P6C2 ;3 LDA #$0B ;2 STA P6C3 ;3 LDA #$0C ;2 STA P7C1 ;3 LDA #$0D ;2 STA P7C2 ;3 LDA #$0E ;2 STA P7C3 ;3 PLA ;4 RTI ;6 LE8EE: PHA ;3 SetUpDLVector E930 INC POWER_DOWN_LO_COUNTER ;5 BNE LE902 ;2 ; If Lo counter = 256 (looped) increment high-counter INC POWER_DOWN_HI_COUNTER ;5 BNE LE902 ;2 ; If high counter = 256 (max), then Jump to system reset code. JMP LE931 ;3 LE902: ; Otherwise, no system reset; continue as normal INC $90 ;5 LDA $90 ;3 AND #$03 ;2 BNE LE91A ;2 LDA $91 ;3 BPL LE914 ;2 JSR LE945 ;6 JMP LE921 ;3 LE914: JSR LE98A ;6 JMP LE921 ;3 LE91A: AND #$01 ;2 BEQ LE921 ;2 JSR LE9CF ;6 LE921: JSR LE9D6 ;6 JSR LE723 ;6 SetUpDLVector E780 PLA ;4 RTI ;6 ;==================================================== ; SYSTEM POWER-DOWN CODE ; An Advanced 7800 trick that isn't in the manual, ; and which Mommy probably doesn't want you to know ;==================================================== LE931: LDX #$10 ;2 LE933: LDA LE93E,X ;4 STA $80,X ;4 DEX ;2 BPL LE933 ;2 JMP.w $0080 ;3 ; see note below! ; The vector below is copied into $80. When you JMP $0080, ; the following code is executed ; LDA #$02 ; STA INPTCTRL ; (start vertical blank), but really power cycles machine. ; JMP $FFFC ; start vector LE93E: .byte $A9,$02,$85,$01,$6C,$FC,$FF ;==================================================== LE945: DEC $1806 ;6 INC $1815 ;6 INC $1A04 ;6 INC $1A09 ;6 INC $1A22 ;6 INC $1A26 ;6 INC $1A3F ;6 INC $1A43 ;6 INC $1A5C ;6 INC $1A60 ;6 INC $1A79 ;6 INC $1A7D ;6 INC $1A19 ;6 INC $1A1E ;6 INC $1A36 ;6 INC $1A3B ;6 INC $1A53 ;6 INC $1A58 ;6 INC $1A70 ;6 INC $1A75 ;6 INC $91 ;5 BNE LE989 ;2 LDA #$0E ;2 STA $91 ;3 LE989: RTS ;6 LE98A: INC $1806 ;6 DEC $1815 ;6 DEC $1A04 ;6 DEC $1A09 ;6 DEC $1A22 ;6 DEC $1A26 ;6 DEC $1A3F ;6 DEC $1A43 ;6 DEC $1A5C ;6 DEC $1A60 ;6 DEC $1A79 ;6 DEC $1A7D ;6 DEC $1A19 ;6 DEC $1A1E ;6 DEC $1A36 ;6 DEC $1A3B ;6 DEC $1A53 ;6 DEC $1A58 ;6 DEC $1A70 ;6 DEC $1A75 ;6 DEC $91 ;5 BNE LE9CE ;2 LDA #$F2 ;2 STA $91 ;3 LE9CE: RTS ;6 LE9CF: DEC $1A90 ;6 DEC $1A95 ;6 RTS ;6 LE9D6: INC $92 ;5 LDA $92 ;3 JSR LE9E0 ;6 STA $92 ;3 RTS ;6 LE9E0: ; Subroutine invoked during a DLI interrupt ; (called from 2 lines after LE832) CMP #$28 BMI LE9E7 SEC SBC #$10 LE9E7 RTS ;************************ ;* DLL to copy to $1800 * ;************************ LE9E8: dc.b $8F,$1A,$00 ;[00-16] dc.b $08,$1A,$00 ;[17-25] Unseen TV lines dc.b $4E,$1A,$02 ;[00-15] dc.b $4F,$1A,$0D ;[16-31] dc.b $4F,$1A,$2A ;[32-47] dc.b $CF,$1A,$47 ;[48-63] dc.b $CF,$1A,$64 ;[64-79] dc.b $40,$1A,$81 ;[80] dc.b $0F,$1A,$00 ;[81-96] dc.b $A9,$1A,$8C ;[97-106] dc.b $8D,$1A,$00 ;[107-120] dc.b $81,$1A,$00 ;[121-122] dc.b $07,$1B,$96 ;[130] dc.b $07,$1A,$00 ;[138] dc.b $87,$1A,$00 ;[146] dc.b $07,$1B,$00 ;[154] dc.b $07,$1B,$00 ;[162] dc.b $07,$1A,$00 ;[170] dc.b $87,$1A,$00 ;[178] dc.b $07,$1B,$53 ;[186] dc.b $07,$1B,$53 ;[194] dc.b $05,$1A,$00 ;[200] Unseen TV lines dc.b $0F,$1A,$00 ;[216] dc.b $8F,$1A,$00 ;[232] ;************************* ;* DL's to copy to $1A00 * ;************************* ; The "0,1,2,3,4" characters are 4 bytes long, so we can make things look nice ; if we divide by 4 and then add an offset that makes these easily readible in ; ASCII (the offset is the difference betwen the character low-address and the ; ASCII offset for this character) ASCII_OFFSET_1 EQU $A0 ZER EQU "0" *4-ASCII_OFFSET_1 ; zero character ONE EQU "1" *4-ASCII_OFFSET_1 ; one character TWO EQU "2" *4-ASCII_OFFSET_1 ; two character THR EQU "3" *4-ASCII_OFFSET_1 ; three character FOU EQU "4" *4-ASCII_OFFSET_1 ; four character LEA30: ; ********* ; * $1A00 * ; ********* dc.b $00,$00 ;Empty DL ; ********* ; * $1A02 * ; ********* dc.b ZER,$C0,$A1,$1C,$00 ; GFX "0" left side of screen (direct mode) dc.b ZER,$1C,$A1,$98 ; GFX "0" right side of screen dc.b $00,$00 ; ********* ; * $1A0D * ; ********* dc.b $00,$60,$19,$11,$12 ; "7800 PRO SYSTEM" dc.b $3C,$60,$19,$11,$42 ; " " dc.b ZER,$C0,$91,$1C,$00 ; GFX "0" left side of screen (direct mode) dc.b ZER,$1C,$91,$98 ; GFX "0" right side of screen dc.b ONE,$1C,$A1,$00 ; GFX "1" left side of screen dc.b ONE,$1C,$A1,$98 ; GFX "1" right side of screen dc.b $00,$00 ; ********* ; * $1A2A * ; ********* dc.b $0F,$60,$19,$11,$12 ; "DIAGNOSTIC TEST" dc.b $3C,$60,$19,$11,$42 ; " " dc.b ONE,$C0,$91,$1C,$00 ; GFX "1" left side of screen (direct mode) dc.b ONE,$1C,$91,$98 ; GFX "1" right side of screen dc.b TWO,$1C,$A1,$00 ; GFX "2" left side of screen dc.b TWO,$1C,$A1,$98 ; GFX "2" right side of screen dc.b $00,$00 ; ********* ; * $1A47 * ; ********* dc.b $1E,$60,$19,$11,$12 ; " BAD!!!!!" dc.b $3C,$60,$19,$11,$42 ; " " dc.b TWO,$C0,$91,$1C,$00 ; GFX "2" left side of screen (direct mode) dc.b TWO,$1C,$91,$98 ; GFX "2" right side of screen dc.b THR,$1C,$A1,$00 ; GFX "3" left side of screen dc.b THR,$1C,$A1,$98 ; GFX "3" right side of screen dc.b $00,$00 ; ********* ; * $1A64 * ; ********* dc.b $2D,$60,$19,$11,$12 ; "VERSION 1:00" dc.b $3C,$60,$19,$11,$42 ; " " dc.b THR,$C0,$91,$1C,$00 ; GFX "3" left side of screen (direct mode) dc.b THR,$1C,$91,$98 ; GFX "3" right side of screen dc.b FOU,$1C,$A1,$00 ; GFX "4" left side of screen dc.b FOU,$1C,$A1,$98 ; GFX "4" right side of screen dc.b $00,$00 ; ********* ; * $1A81 * ; ********* dc.b FOU,$C0,$A0,$1C,$00 ; GFX "4" left side of screen (direct mode) dc.b FOU,$1C,$A0,$98 ; GFX "4" right side of screen dc.b $00,$00 ; ********* ; * $1A8C * ; ********* dc.b $4B,$60,$19,$00,$00 ; "USE TOP COLOR WHEEL - ADJUST COL" dc.b $6B,$60,$19,$08,$80 ; "ORS TILL RIGHT BAR SOLID" dc.b $1C,$C0,$9E,$1F,$00 dc.b $1C,$1F,$A0,$00 dc.b $1C,$1F,$9E,$9E dc.b $1C,$1F,$A0,$9E dc.b $00,$00 ;************************* ;* DL's to copy to $1B00 * ;************************* LEAD9: dc.b $00,$40,$B8,$7E,$00 ; $1B00 dc.b $02,$7E,$B8,$09 dc.b $04,$7E,$B8,$12 dc.b $00,$9E,$B8,$1B dc.b $02,$9E,$B8,$24 dc.b $04,$9E,$B8,$2D dc.b $00,$BE,$B8,$36 dc.b $02,$BE,$B8,$3F dc.b $04,$BE,$B8,$48 dc.b $00,$DE,$B8,$51 dc.b $02,$DE,$B8,$5A dc.b $04,$DE,$B8,$63 dc.b $00,$FE,$B8,$6C dc.b $02,$FE,$B8,$75 dc.b $04,$FE,$B8,$7E dc.b $04,$FE,$B8,$87 dc.b $04,$FE,$B8,$90 dc.b $01,$7F,$B8,$84 dc.b $01,$7F,$B8,$8D dc.b $02,$7E,$B8,$99 dc.b $00,$00 dc.b $00,$40,$B8,$7E,$18 ; $1B53 dc.b $02,$7E,$B8,$1F dc.b $04,$7E,$B8,$26 dc.b $00,$9E,$B8,$2D dc.b $02,$9E,$B8,$34 dc.b $04,$9E,$B8,$3B dc.b $00,$BE,$B8,$42 dc.b $02,$BE,$B8,$49 dc.b $04,$BE,$B8,$50 dc.b $00,$DE,$B8,$57 dc.b $02,$DE,$B8,$5E dc.b $04,$DE,$B8,$65 dc.b $00,$FE,$B8,$6C dc.b $02,$FE,$B8,$73 dc.b $04,$FE,$B8,$7A dc.b $02,$1E,$B8,$81 dc.b $00,$00 dc.b $83,$E0,$19,$08,$20 ; $1B96 dc.b $06,$40,$B8,$FE,$20 dc.b $06,$FE,$B8,$77 dc.b $06,$9E,$B8,$18 dc.b $06,$9E,$B8,$7F dc.b $00,$00 LEB87: ;********************************** ;* Character Map to copy to $1900 * ;********************************** ; $1900 dc.b "7" * 2 dc.b "8" * 2 dc.b "0" * 2 dc.b "0" * 2 dc.b " " * 2 dc.b "P" * 2 dc.b "R" * 2 dc.b "O" * 2 dc.b " " * 2 dc.b "S" * 2 dc.b "Y" * 2 dc.b "S" * 2 dc.b "T" * 2 dc.b "E" * 2 dc.b "M" * 2 ; $190F dc.b "D" * 2 dc.b "I" * 2 dc.b "A" * 2 dc.b "G" * 2 dc.b "N" * 2 dc.b "O" * 2 dc.b "S" * 2 dc.b "T" * 2 dc.b "I" * 2 dc.b "C" * 2 dc.b " " * 2 dc.b "T" * 2 dc.b "E" * 2 dc.b "S" * 2 dc.b "T" * 2 ; $191E dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b "B" * 2 dc.b "A" * 2 dc.b "D" * 2 dc.b "!" * 2 dc.b "!" * 2 dc.b "!" * 2 dc.b "!" * 2 dc.b "!" * 2 ; $192D dc.b "V" * 2 dc.b "E" * 2 dc.b "R" * 2 dc.b "S" * 2 dc.b "I" * 2 dc.b "O" * 2 dc.b "N" * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b "1" * 2 dc.b ":" * 2 dc.b "0" * 2 dc.b "0" * 2 ; $193C dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 dc.b " " * 2 ; $194B ASCII_OFFSET_2 EQU 63 dc.b "U" - ASCII_OFFSET_2 dc.b "S" - ASCII_OFFSET_2 dc.b "E" - ASCII_OFFSET_2 dc.b $00 dc.b "T" - ASCII_OFFSET_2 dc.b "O" - ASCII_OFFSET_2 dc.b "P" - ASCII_OFFSET_2 dc.b $00 dc.b "C" - ASCII_OFFSET_2 dc.b "O" - ASCII_OFFSET_2 dc.b "L" - ASCII_OFFSET_2 dc.b "O" - ASCII_OFFSET_2 dc.b "R" - ASCII_OFFSET_2 dc.b $00 dc.b "W" - ASCII_OFFSET_2 dc.b "H" - ASCII_OFFSET_2 dc.b "E" - ASCII_OFFSET_2 dc.b "E" - ASCII_OFFSET_2 dc.b "L" - ASCII_OFFSET_2 dc.b $00 dc.b $01 ; "-" dc.b $00 dc.b "A" - ASCII_OFFSET_2 dc.b "D" - ASCII_OFFSET_2 dc.b "J" - ASCII_OFFSET_2 dc.b "U" - ASCII_OFFSET_2 dc.b "S" - ASCII_OFFSET_2 dc.b "T" - ASCII_OFFSET_2 dc.b $00 dc.b "C" - ASCII_OFFSET_2 dc.b "O" - ASCII_OFFSET_2 dc.b "L" - ASCII_OFFSET_2 ; $196B dc.b "O" - ASCII_OFFSET_2 dc.b "R" - ASCII_OFFSET_2 dc.b "S" - ASCII_OFFSET_2 dc.b $00 dc.b "T" - ASCII_OFFSET_2 dc.b "I" - ASCII_OFFSET_2 dc.b "L" - ASCII_OFFSET_2 dc.b "L" - ASCII_OFFSET_2 dc.b $00 dc.b "R" - ASCII_OFFSET_2 dc.b "I" - ASCII_OFFSET_2 dc.b "G" - ASCII_OFFSET_2 dc.b "H" - ASCII_OFFSET_2 dc.b "T" - ASCII_OFFSET_2 dc.b $00 dc.b "B" - ASCII_OFFSET_2 dc.b "A" - ASCII_OFFSET_2 dc.b "R" - ASCII_OFFSET_2 dc.b $00 dc.b "S" - ASCII_OFFSET_2 dc.b "O" - ASCII_OFFSET_2 dc.b "L" - ASCII_OFFSET_2 dc.b "I" - ASCII_OFFSET_2 dc.b "D" - ASCII_OFFSET_2 ; $1983 dc.b $07,$09,$0B,$0D dc.b $07,$09,$0B,$0D dc.b $07,$09,$0B,$0D dc.b $07,$09,$0B,$0D dc.b $07,$09,$0B,$0D dc.b $07,$09,$0B,$0D ORG $EFFF dc.b $FF