; Disassembly of diag2_2.bin
; Disassembled Thu Feb 14 14:33:33 2002
; Using DiStella v2.0
;
; Command Line: C:\ATARI\DISTELLA\DISTELLA.EXE -pafs diag2_2.bin 
;

; Layout of this 4K section
; 
; F026-F193 2600 Yuk face code & data
; F194-F6EF 2600 diagnostic screen code

; LF980 Start 2600-based error code processing.
; FB00-FB2E 2600 diagnostic screen data

      processor 6502


;*********************
; ATARI 7800 equates!
;*********************
BACKGRND = $20

;*********************
; ATARI 2600 equates!
;*********************
VSYNC   =  $00
VBLANK  =  $01
WSYNC   =  $02
RSYNC   =  $03
NUSIZ0  =  $04
NUSIZ1  =  $05
COLUP0  =  $06
COLUP1  =  $07
COLUPF  =  $08
COLUBK  =  $09
CTRLPF  =  $0A
REFP0   =  $0B
REFP1   =  $0C
PF0     =  $0D
PF1     =  $0E
PF2     =  $0F
RESP0   =  $10
RESP1   =  $11
RESM0   =  $12
RESM1   =  $13
AUDC0   =  $15
AUDF0   =  $17
AUDV0   =  $19
GRP0    =  $1B
GRP1    =  $1C
ENAM0   =  $1D
ENAM1   =  $1E
ENABL   =  $1F
HMP0    =  $20
HMP1    =  $21
HMM0    =  $22
HMM1    =  $23
HMBL    =  $24
VDELP0  =  $25
VDELP1  =  $26
VDELBL  =  $27
RESMP0  =  $28
RESMP1  =  $29
HMOVE   =  $2A
HMCLR   =  $2B
CXCLR   =  $2C
CXM0P   =  $30
CXM1P   =  $31
CXBLPF  =  $36
INPT0   =  $38
INPT1   =  $39
INPT2   =  $3A
INPT3   =  $3B
INPT4   =  $3C
INPT5   =  $3D


SWCHA   =  $0280
SWACNT  =  $0281
SWCHB   =  $0282
SWBCNT  =  $0283
INTIM   =  $0284
TIM1T   =  $0294
TIM8T   =  $0295
TIM64T  =  $0296
T1024T  =  $0297

GRP_ScanLineCount       equ     $97
NUM_2600_screens        equ     $AB

;########
; Macros
;########
      mac   ErrorCode
      LDY   #${1}
      JMP   LF026
      endm

;#####################
       seg.u RAMdata
;#####################

       ORG     $0484
       ; copied from $F89F

       ; Oddly enough, this is the same as lines F7D4 - F834.
       ; This code is believed to clear out TIA info in preparation 
       ; for 2600 mode transition.

       LDA    #$00    ;2
       TAX            ;2
       STA    VBLANK  ;3
L0489: STA    RSYNC,X ;4
       INX            ;2
       CPX    #$2A    ;2
       BNE    L0489   ;2
       STA    WSYNC   ;3
       LDA    #$04    ;2 now we waste time until we need to RESP0
       NOP            ;2
       BMI    L04BA   ;2 (never taken)
       LDX    #$04    ;2
L0499: DEX            ;2
       BPL    L0499   ;2
       TXS            ;2
       STA    $0110   ;4 (Shadow version of RESP0)
       JSR    $04CF   ;6 (automatic RTS; wasting cycles)
       JSR    $04CF   ;6 (automatic RTS; wasting cycles)
       STA    RESP1   ;3
       STA    GRP0    ;3 $FF
       STA    GRP1    ;3 $FF
       STA    PF2     ;3 $FF
       NOP            ;2
       STA    WSYNC   ;3
       LDA    #$00    ;2
       NOP            ;2
       BMI    L04BA   ;2 (never taken)
       BIT    RSYNC   ;3
       BMI    L04C3   ;2
L04BA: LDA    #$02    ;2 grey
       STA    COLUBK  ;3
       STA    $F112   ;4 ????
       BNE    L04E1   ;2 (always taken)

L04C3: BIT    WSYNC   ;3
       BMI    L04D3   ;2
       LDA    #$02    ;2
       STA    COLUP0  ;3
       ; dc.b $8D ; L04CB
       ; dc.b $18 ; L04CC
       ; dc.b $F1 ; L04CD
       ; dc.b $8D ; L04CE
       ; dc.b $60 ; L04CF (RTS)
       STA    $F118   ;4 ????
       STA    $F460   ;4 ????
       BNE    L04E1   ;2
L04D3: STA    CXCLR   ;3
       LDA    #$08    ;2
       STA    GRP0    ;3
       JSR    $04CF   ;6
       NOP            ;2
       BIT    WSYNC   ;3
       BMI    L04BA   ;2
L04E1: LDA    #$FD    ;2
       STA    COLUPF  ;3

       ; end of copy of 7800 BOIS similarity

       LDA    #$00    ;2
       STA    COLUPF  ;3
       STA    COLUBK  ;3
       STA    COLUP0  ;3
       STA    COLUP1  ;3
       JMP    LF980   ;3


;#####################
       seg code
;#####################

       ORG $F000

START:

	; First of all, see if we're on a 7800.  If so,
	; address $2000 should be in RAM.  If not, then
	; we must be running on a 2600!

LF000: LDA    #$30    ;2 (explained in note below what this value does)

  ;######
  ;  IF 7800 mode
  ;    STA    CTRL    ;3
  ;      This is interesting!  It puts the MARIA into Test Mode B
  ;      (DM 0,1 == "%01")  Though we're never supposed to do this,
  ;      the diagnostic cart gets away with it!
  ;  ELSE if 2600 mode (same equate)
       STA    INPT4   ;3
  ;######
       SEI            ;2
       CLD            ;2
       LDA    #$55    ;2
       STA    $2000   ;4
       CMP    $2000   ;4
       BNE    LF021   ;2 RAM test-- can we store to $2000?  If not,
                      ;             RAM is broken or we're on a 2600.
       LDA    #$AA    ;2
       STA    $2000   ;4
       CMP    $2000   ;4
       BNE    LF021   ;2 RAM test-- can we store to $2000?  If not,
                      ;             RAM is broken or we're on a 2600.
       LDA    #$00    ;2
       STA    BACKGRND    ;3
       JMP    $E000   ;3 Go to the 7800-intensive tests (upper 4K of this 8K segment)


	; Load up error code 3
LF021: ErrorCode 3

	; Handle Errors Routine: Runs on a 2600!

LF026: LDA    #$0D    ;2 NO IDEA
       STA    RSYNC   ;3 NO IDEA
       LDX    #$FF    ;2
       TXS            ;2 set stack pointer to $FF
       INX            ;2
       TXA            ;2
LF02F: STA    VSYNC,X ;4
       INX            ;2
       BNE    LF02F   ;2 clear out registers $00-$2F.  Clears out PF0,1,2,
                      ;  as well as GRP0,1 and turns all colors to black.
       LDA    #$00    ;2
       STA    SWACNT  ;4
       STA    SWBCNT  ;4
       LDA    #$01    ;2
       STA    CTRLPF  ;3 Reflected playfield
       STA    VDELP0  ;3 Enable GRP0A and GRP1A temp storage.
       STA    VDELP1  ;3
       LDA    #$00    ;2 Clear out the GRP0/0A/1/1A GFX registers
       STA    GRP0    ;3
       STA    GRP1    ;3
       STA    GRP0    ;3 
       STA    GRP1    ;3
       LDX    #$18    ;2 Yellow
       STX    COLUPF  ;3  (yellow Yuk face out of PF GFX)
       STX    COLUP0  ;3  (yellow Error code, GRP GFX)
       STX    COLUP1  ;3
       LDX    #$34    ;2 Blue background
       STX    COLUBK  ;3
       LDX    #$09    ;2
       STA    WSYNC   ;3
LF05E: DEX            ;2
       BNE    LF05E   ;2 wait 9 scanlines
       STA    RESP0   ;3 P0 gfx in HBLANK area
       LDX    #$09    ;2
       STA    WSYNC   ;3
LF067: DEX            ;2
       BNE    LF067   ;2 wait 9 scanlines
       STA    RESP1   ;3 P1 gfx in HBLANK area
       LDA    #$60    ;2
       STA    HMP0    ;3
       LDA    #$D0    ;2
       STA    HMP1    ;3
       STA    WSYNC   ;3
       STA    HMOVE   ;3
       TYA            ;2 Y still contains the error code!
       AND    #$F0    ;2	GET MSB of error code
       LSR            ;2
       ADC    #$07    ;2
       TAX            ;2 X contains offset to Yuk Face GFX for MSB of code
       TXS            ;2
       TYA            ;2	Get LSB of error code (from Y)
       AND    #$0F    ;2	Mask off lower 4 bits
       ASL            ;2
       ASL            ;2
       ASL            ;2	Multiply Y times 8 (8 = height of number graphic)
       ADC    #$07    ;2	Add offset of 7
       TAY            ;2	Re-store that in Y
                      ;  Y contains offset to Yuk Face GFX for LSB of code
LF089: LDA    #$02    ;2
       STA    WSYNC   ;3
       STA    VBLANK  ;3 
       STA    VSYNC   ;3 Start VSYNC period
       STX    WSYNC   ;3
       STX    WSYNC   ;3
       STX    WSYNC   ;3
       LDA    #$00    ;2
       STA    VSYNC   ;3 End VSYNC period
       LDX    #$25    ;2
LF09D: STX    WSYNC   ;3 Draw 25 empty scanlines (VBLANK)
       DEX            ;2
       BNE    LF09D   ;2
       LDA    #$00    ;2
       STA    VBLANK  ;3 Turn off VBLANK
       LDX    #$23    ;2
LF0A8: STX    WSYNC   ;3 Draw 23 empty scanlines onscreen
       DEX            ;2
       BNE    LF0A8   ;2
LF0AD: STA    WSYNC   ;3
       LDA    LF114,X ;4 Get PF1 YUK face GFX
       STA    PF1     ;3
       INX            ;2
       LDA    LF114,X ;4
       STA    PF2     ;3 Get PF2 YUK face GFX
       INX            ;2
       TXA            ;2
       STX    WSYNC   ;3
       STX    WSYNC   ;3
       STX    WSYNC   ;3
       STX    WSYNC   ;3 Draw 4 scanlines worth of these PF GFX
       TAX            ;2
       CPX    #$28    ;2 Have we hit the last scanline for drawing
                      ;  the Yuk Face?
       BNE    LF0AD   ;2
       LDA    #$00    ;2 If so, clear out PF0 and PF1.
       STA    PF1     ;3
       STA    PF2     ;3
       STA    WSYNC   ;3
       TSX            ;2
       STA    WSYNC   ;3
       LDA    LF13C,X ;4 Get the MSB GFX for error code
       STA    GRP0    ;3 Pre-load GRP0A (VDELP0 = 1)
       DEX            ;2
       LDA    #$08    ;2
       STA    GRP_ScanLineCount ;3     8 scanlines total
       STA    WSYNC   ;3
LF0E0: LDA    LF13C,Y ;4 Get the LSB GFX for error code
       STA    GRP1    ;3 Pre-load GRP1A (VDELP1 = 1), load GRP0
       LDA    LF13C,X ;4 Get the next MSB GFX for error code
       STA    GRP0    ;3 Pre-load GRP0A (VDELP=1), load GRP1
       DEC    GRP_ScanLineCount ;5
       BMI    LF0F7   ;2 Check if we have more scanlines to write out
                      ;  GRP0/1 GFX data

       STA    WSYNC   ;3 There are more scanlines left for GRP0 and GRP1,
       STA    WSYNC   ;3 so write out 2 scanlines with these GFX,
       DEX            ;2 decrement both GFX offsets, 
       DEY            ;2
       JMP    LF0E0   ;3 and loop until done.

LF0F7: LDA    #$00    ;2 Ok, we're done with the GRP0/1 GFX, so
       STA    GRP0    ;3 let's clear out GRP0/1/0A/1A
       STA    GRP1    ;3
       STA    GRP0    ;3
       INX            ;2 Let's reset X and Y! X was decremented once too
                      ;  much, so let's fix that here.
       LDA    #$08    ;2 Next, let's loop 8 times, and increment
LF102: INX            ;2 X and Y on each time through
       INY            ;2
       SEC            ;2
       SBC    #$01    ;2
       BNE    LF102   ;2 Lopp until X and Y point to GRP0/1 GFX offsets again
       TXS            ;2
       LDX    #$45    ;2
LF10C: STX    WSYNC   ;3 Draw 45 more lines (end of frame + overscan)
       DEX            ;2
       BNE    LF10C   ;2
       JMP    LF089   ;3 Loop back to re-draw the screen forever.

LF114:
        ; PF1, PF2 for Yuck face (mirrored)
        dc.b   $00,$E0 ;00000000 00000111 11100000 00000000
        dc.b   $00,$18 ;00000000 00011000 00011000 00000000
        dc.b   $00,$04 ;00000000 00100000 00000100 00000000
        dc.b   $00,$02 ;00000000 01000000 00000010 00000000
        dc.b   $00,$01 ;00000000 10000000 00000001 00000000
        dc.b   $01,$28 ;00000001 00010100 00101000 10000000
        dc.b   $01,$10 ;00000001 00001000 00010000 10000000
        dc.b   $02,$00 ;00000010 00000000 00000000 01000000
        dc.b   $02,$80 ;00000010 00000001 10000000 01000000
        dc.b   $02,$80 ;00000010 00000001 10000000 01000000
        dc.b   $02,$00 ;00000010 00000000 00000000 01000000
        dc.b   $02,$C0 ;00000010 00000011 11000000 01000000
        dc.b   $02,$30 ;00000010 00001100 00110000 01000000
        dc.b   $01,$08 ;00000001 00010000 00001000 10000000
        dc.b   $01,$04 ;00000001 00100000 00000100 10000000
        dc.b   $00,$01 ;00000000 10000000 00000001 00000000
        dc.b   $00,$02 ;00000000 01000000 00000010 00000000
        dc.b   $00,$04 ;00000000 00100000 00000100 00000000
        dc.b   $00,$18 ;00000000 00011000 00011000 00000000
        dc.b   $00,$E0 ;00000000 00000111 11100000 00000000

LF13C:
	; '0'
        dc.b   %00111100 ;$3C
        dc.b   %01111110 ;$7E
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66
        dc.b   %01111110 ;$7E
        dc.b   %00111100 ;$3C

	; '1'
        dc.b   %01111110 ;$7E
        dc.b   %01111110 ;$7E
        dc.b   %00011000 ;$18
        dc.b   %00011000 ;$18
        dc.b   %00011000 ;$18
        dc.b   %01111000 ;$78
        dc.b   %00111000 ;$38
        dc.b   %00011000 ;$18

	; '2'
        dc.b   %01111110 ;$7E
        dc.b   %01111110 ;$7E
        dc.b   %01100000 ;$60
        dc.b   %00111000 ;$38
        dc.b   %00011100 ;$1C
        dc.b   %00000110 ;$06
        dc.b   %01111110 ;$7E
        dc.b   %01111100 ;$7C

	; '3'
        dc.b   %01111100 ;$7C
        dc.b   %01111110 ;$7E
        dc.b   %00000110 ;$06
        dc.b   %01111110 ;$7E
        dc.b   %01111110 ;$7E
        dc.b   %00000110 ;$06
        dc.b   %01111110 ;$7E
        dc.b   %01111100 ;$7C

	; '4'
        dc.b   %00000110 ;$06
        dc.b   %00000110 ;$06
        dc.b   %00000110 ;$06
        dc.b   %01111110 ;$7E
        dc.b   %01111110 ;$7E
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66

	; '5'
        dc.b   %01111100 ;$7C
        dc.b   %01111110 ;$7E
        dc.b   %00000110 ;$06
        dc.b   %01111110 ;$7E
        dc.b   %01111100 ;$7C
        dc.b   %01100000 ;$60
        dc.b   %01111110 ;$7E
        dc.b   %01111110 ;$7E

	; '6'
        dc.b   %00111100 ;$3C
        dc.b   %01111110 ;$7E
        dc.b   %01100110 ;$66
        dc.b   %01111110 ;$7E
        dc.b   %01111100 ;$7C
        dc.b   %01100000 ;$60
        dc.b   %01111110 ;$7E
        dc.b   %00111100 ;$3C

	; '7'
        dc.b   %00011000 ;$18
        dc.b   %00011000 ;$18
        dc.b   %00011000 ;$18
        dc.b   %00001100 ;$0C
        dc.b   %00001100 ;$0C
        dc.b   %00000110 ;$06
        dc.b   %01111110 ;$7E
        dc.b   %01111110 ;$7E

	; '8'
        dc.b   %00111100 ;$3C
        dc.b   %01111110 ;$7E
        dc.b   %01100110 ;$66
        dc.b   %00111100 ;$3C
        dc.b   %00111100 ;$3C
        dc.b   %01100110 ;$66
        dc.b   %01111110 ;$7E
        dc.b   %00111100 ;$3C

	; '9'
        dc.b   %00111100 ;$3C
        dc.b   %01111110 ;$7E
        dc.b   %00000110 ;$06
        dc.b   %00111110 ;$3E
        dc.b   %01111110 ;$7E
        dc.b   %01100110 ;$66
        dc.b   %01111110 ;$7E
        dc.b   %00111100 ;$3C

        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66
        dc.b   %00011000 ;$18
        dc.b   %00011000 ;$18
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66
        dc.b   %01100110 ;$66


;#####################
; NEW CHUNK
;#####################
LF194:
       LDA    #$20    ;2
       STA    NUM_2600_screens ;3  Will draw 20 blank 2600 screens
LF198: LDA    #$02    ;2
       STA    WSYNC   ;3
       STA    VBLANK  ;3
       STA    VSYNC   ;3 Turn on VSYNC
       LDX    #$03    ;2
       JSR    LFB00   ;6 Calls WSYNC 3x (VSYNC)
       LDA    #$00    ;2 Turn off VSYNC
       STA    VSYNC   ;3
       LDX    #$25    ;2
       JSR    LFB00   ;6 Call 25x WSYNC (for VBLANK)
       LDA    #$00    ;2
       STA    VBLANK  ;3
       LDX    #$DD    ;2 
       JSR    LFB00   ;6 Call 221x WSYNC (192 screen + 29 overscan)
       INC    NUM_2600_screens ;5
       BIT    NUM_2600_screens ;3
       BVC    LF198   ;2
       LDA    #$00    ;2
       STA    SWACNT  ;4
       STA    SWBCNT  ;4
       STA    $AB     ;3
       STA    GRP1    ;3
       STA    ENAM0   ;3
       LDA    SWCHB   ;4
       STA    $95     ;3
       LDA    #$FF    ;2
       STA    $98     ;3
LF1D4: LDA    #$02    ;2
       STA    WSYNC   ;3
       STA    VBLANK  ;3
       STA    VSYNC   ;3
       LDX    #$03    ;2
       JSR    LFB00   ;6 Call 3x WSYNC (VSYNC)
       LDA    #$00    ;2
       STA    VSYNC   ;3
       LDA    #$27    ;2
       STA    TIM64T  ;4
LF1EA: LDA    INTIM   ;4
       BNE    LF1EA   ;2
       STA    WSYNC   ;3
       STA    VBLANK  ;3
       LDA    #$10    ;2
       STA    T1024T  ;4
       LDX    #$04    ;2
LF1FA: LDA    LF4D3,X ;4
       JSR    LFB06   ;6
       DEX            ;2
       BPL    LF1FA   ;2
       LDA    #$00    ;2
       STA    VDELP0  ;3
       STA    VDELP1  ;3
       STA    COLUPF  ;3
       STA    COLUBK  ;3
       LDA    #$08    ;2
       STA    REFP1   ;3
       LDA    #$03    ;2
       STA    CTRLPF  ;3
       LDA    #$05    ;2
       STA    NUSIZ0  ;3
       STA    NUSIZ1  ;3
       DEC    $99     ;5
       LDA    $99     ;3
       CMP    #$0F    ;2
       BNE    LF227   ;2
       LDA    #$FF    ;2
       STA    $99     ;3
LF227: LDX    #$02    ;2
       STA    WSYNC   ;3
       STA    HMOVE   ;3
       STA    WSYNC   ;3
       STX    ENAM0   ;3
       STX    ENAM1   ;3
       STX    HMCLR   ;3
       LDX    LF515   ;4
       STA    COLUP0  ;3
       STA    COLUP1  ;3
       STX    GRP0    ;3
       STX    GRP1    ;3
       LDX    #$80    ;2
       STX    PF2     ;3
       LDX    #$3D    ;2
LF246: STA    WSYNC   ;3
       STA    HMOVE   ;3
       STA    COLUP0  ;3
       STA    COLUPF  ;3
       STA    COLUP1  ;3
       LDY    LF4D8,X ;4
       STY    GRP0    ;3
       STY    GRP1    ;3
       LDY    LF516,X ;4
       STY    HMP0    ;3
       LDY    LF555,X ;4
       STY    HMM0    ;3
       LDY    LF594,X ;4
       STY    HMP1    ;3
       LDY    LF5D3,X ;4
       STY    HMM1    ;3
       CLC            ;2
       ADC    #$02    ;2
       BCC    LF272   ;2
       ADC    #$0F    ;2
LF272: DEX            ;2
       BPL    LF246   ;2
       LDA    #$00    ;2
       STA    ENAM0   ;3
       STA    ENAM1   ;3
       STA    PF2     ;3
       STA    GRP0    ;3
       STA    GRP1    ;3
       STA    REFP1   ;3
       LDA    #$00    ;2
       STA    VDELP0  ;3
       STA    NUSIZ0  ;3
       TAX            ;2
       LDA    #$A0    ;2
       JSR    LFB06   ;6
       STA    WSYNC   ;3
       STA    HMOVE   ;3
       LDA    #$00    ;2
       BIT    $98     ;3
       BMI    LF29B   ;2
       LDA    #$FF    ;2
LF29B: STA    COLUP0  ;3
       LDX    #$09    ;2
LF29F: STA    WSYNC   ;3
       LDA    $97     ;3
       BNE    LF2AB   ;2
       LDA    LF612,X ;4
       JMP    LF2AE   ;3
LF2AB: LDA    LF61C,X ;4
LF2AE: STA    GRP0    ;3
       DEX            ;2
       BPL    LF29F   ;2
       LDA    #$01    ;2
       STA    VDELP0  ;3
       STA    VDELP1  ;3
       TAX            ;2
       LDA    #$70    ;2
       JSR    LFB06   ;6
       DEX            ;2
       LDA    #$68    ;2
       JSR    LFB06   ;6
       STA    WSYNC   ;3
       STA    HMOVE   ;3
       STA    WSYNC   ;3
       LDA    #$E8    ;2
       STA    COLUBK  ;3
       LDA    #$74    ;2
       STA    COLUP1  ;3
       STA    COLUP0  ;3
       LDA    #$03    ;2
       STA    NUSIZ0  ;3
       STA    NUSIZ1  ;3
       LDX    #$10    ;2
LF2DD: LDA    LF626,X ;4
       STA    GRP0    ;3
       STA    WSYNC   ;3
       LDA    LF637,X ;4
       STA    GRP1    ;3
       LDA    LF648,X ;4
       STA    GRP0    ;3
       LDA    LF659,X ;4
       STA    $9A     ;3
       LDA    LF66A,X ;4
       LDY    LF67B,X ;4
       TXS            ;2
       NOP            ;2
       NOP            ;2
       CMP    $9A     ;3
       LDX    $9A     ;3
       STX    GRP1    ;3
       STA    GRP0    ;3
       STY    GRP1    ;3
       STA    GRP0    ;3
       TSX            ;2
       DEX            ;2
       BPL    LF2DD   ;2
       LDX    #$FF    ;2
       TXS            ;2
       LDA    #$31    ;2
       STA    CTRLPF  ;3
       LDA    #$00    ;2
       STA    WSYNC   ;3
       STA    WSYNC   ;3
       STA    WSYNC   ;3
       LDY    #$34    ;2
       STY    COLUBK  ;3
       STA    WSYNC   ;3
       LDX    #$00    ;2
       STA    WSYNC   ;3
LF325: STA    COLUBK  ;3
       LDX    #$05    ;2
       JSR    LFB00   ;6
       CLC            ;2
       ADC    #$02    ;2
       CMP    #$08    ;2
       STA    WSYNC   ;3
       BNE    LF325   ;2
       STA    COLUPF  ;3
       STX    COLUBK  ;3
       LDY    #$FF    ;2
       STY    PF0     ;3
       STY    PF1     ;3
       STY    PF2     ;3
LF341: STA    COLUPF  ;3
       LDX    #$05    ;2
       JSR    LFB00   ;6
       CLC            ;2
       ADC    #$02    ;2
       CMP    #$10    ;2
       STA    WSYNC   ;3
       BNE    LF341   ;2
       LDY    #$34    ;2
       STY    COLUPF  ;3
       STA    WSYNC   ;3
       STA    WSYNC   ;3
       STX    COLUPF  ;3
       LDA    #$03    ;2
       LDX    #$E6    ;2
       LDY    #$26    ;2
       STA    WSYNC   ;3
       STX    COLUP0  ;3
       STY    COLUP1  ;3
       STA    CTRLPF  ;3
       LDX    #$00    ;2
       STX    COLUBK  ;3
       STX    PF2     ;3
       LDX    #$0A    ;2
       JSR    LFB00   ;6
       STX    CTRLPF  ;3
       DEX            ;2
       STX    PF2     ;3
       INC    $AB     ;5
       LDA    $AB     ;3
       AND    #$80    ;2
       LSR            ;2
       LSR            ;2
       LSR            ;2
       LSR            ;2
       LSR            ;2
       ORA    #$01    ;2
       STA    CTRLPF  ;3
       STA    WSYNC   ;3
       LDA    #$F6    ;2
       STA    COLUPF  ;3
       LDA    #$0E    ;2
       STA    COLUP0  ;3
       STA    COLUP1  ;3
       STA    WSYNC   ;3
       LDX    #$07    ;2
LF398: LDA    LF68C,X ;4
       STA    GRP0    ;3
       STA    WSYNC   ;3
       LDA    LF694,X ;4
       STA    GRP1    ;3
       LDA    LF69C,X ;4
       STA    GRP0    ;3
       LDA    LF6A4,X ;4
       STA    $9A     ;3
       LDA    LF6AC,X ;4
       LDY    LF6B4,X ;4
       TXS            ;2
       NOP            ;2
       NOP            ;2
       CMP    $9A     ;3
       LDX    $9A     ;3
       STX    GRP1    ;3
       STA    GRP0    ;3
       STY    GRP1    ;3
       STA    GRP0    ;3
       TSX            ;2
       DEX            ;2
       BPL    LF398   ;2
       STA    WSYNC   ;3
       LDA    #$00    ;2
       STA    GRP0    ;3
       STA    GRP1    ;3
       STA    GRP0    ;3
       STA    WSYNC   ;3
       LDX    #$FF    ;2
       TXS            ;2
       INX            ;2
       STX    COLUPF  ;3
       STX    COLUBK  ;3
       LDA    #$55    ;2
       STA    PF0     ;3
       STA    PF1     ;3
       STA    WSYNC   ;3
       LDA    #$16    ;2
       STA    COLUPF  ;3
       LDA    #$F6    ;2
       STA    COLUBK  ;3
       STA    WSYNC   ;3
       LDX    #$07    ;2
LF3EF: LDA    LF6BC,X ;4
       STA    GRP0    ;3
       STA    WSYNC   ;3
       LDA    LF6C4,X ;4
       STA    GRP1    ;3
       LDA    LF6CC,X ;4
       STA    GRP0    ;3
       LDA    LF6D4,X ;4
       STA    $9A     ;3
       LDA    LF6DC,X ;4
       LDY    LF6E4,X ;4
       TXS            ;2
       NOP            ;2
       NOP            ;2
       CMP    $9A     ;3
       LDX    $9A     ;3
       STX    GRP1    ;3
       STA    GRP0    ;3
       STY    GRP1    ;3
       STA    GRP0    ;3
       TSX            ;2
       DEX            ;2
       BPL    LF3EF   ;2
       LDX    #$FF    ;2
       TXS            ;2
       INX            ;2
       STA    WSYNC   ;3
       STX    GRP0    ;3
       STX    GRP1    ;3
       STX    GRP0    ;3
       STA    WSYNC   ;3
       STX    PF0     ;3
       STX    PF1     ;3
       STX    PF2     ;3
       STX    COLUPF  ;3
       STX    COLUBK  ;3
       STX    COLUP0  ;3
       STX    COLUP1  ;3
       STX    ENABL   ;3
LF43C: LDA    INTIM   ;4
       BPL    LF43C   ;2
       STA    WSYNC   ;3
       LDA    #$07    ;2
       STA    WSYNC   ;3
       STA    TIM64T  ;4
       CLV            ;2
       LDA    $98     ;3
       BPL    LF4B6   ;2
       LDA    #$00    ;2
       STA    $97     ;3
       LDA    SWCHB   ;4
       STA    $96     ;3
       EOR    $95     ;3
       ROL            ;2
       BCS    LF478   ;2
       ROL            ;2
       BCS    LF480   ;2
       ROL            ;2
       ROL            ;2
       BCS    LF470   ;2
       ROL            ;2
       BCS    LF488   ;2
       ROL            ;2
       ROL            ;2
       BCS    LF490   ;2
       ROL            ;2
       BCS    LF498   ;2
       BCC    LF4CB   ;2
LF470: LDA    #$10    ;2
       LDX    #$08    ;2
       LDY    #$12    ;2
       BVC    LF49E   ;2
LF478: LDA    #$80    ;2
       LDX    #$0E    ;2
       LDY    #$01    ;2
       BVC    LF49E   ;2
LF480: LDA    #$40    ;2
       LDX    #$02    ;2
       LDY    #$02    ;2
       BVC    LF49E   ;2
LF488: LDA    #$08    ;2
       LDX    #$0F    ;2
       LDY    #$04    ;2
       BVC    LF49E   ;2
LF490: LDA    #$02    ;2
       LDX    #$01    ;2
       LDY    #$08    ;2
       BVC    LF49E   ;2
LF498: LDA    #$01    ;2
       LDX    #$09    ;2
       LDY    #$10    ;2
LF49E: PHA            ;3
       EOR    $95     ;3
       STA    $95     ;3
       PLA            ;4
       AND    $96     ;3
       BEQ    LF4AA   ;2
       INC    $97     ;5
LF4AA: TYA            ;2
       LDY    $97     ;3
       STA.wy $0017,Y ;5
       STX    AUDC0,Y ;4
       LDA    #$1F    ;2
       STA    $98     ;3
LF4B6: LSR            ;2
       LSR            ;2
       LSR            ;2
       TAX            ;2
       LDA    LF6EC,X ;4
       LDY    $97     ;3
       STA.wy $0019,Y ;5
       DEC    $98     ;5
       BPL    LF4CB   ;2
       LDA    #$00    ;2
       STA.wy $0019,Y ;5
LF4CB: LDA    INTIM   ;4
       BNE    LF4CB   ;2
       JMP    LF1D4   ;3
LF4D3: .byte $69,$85,$7A,$87,$7D
LF4D8: ; GRP0/1
       .byte $03,$07,$0F,$1F,$3F,$3F,$7F,$7F,$7F,$3F,$3F,$1F,$1F,$1F,$1F,$0F
       .byte $0F,$0F,$0F,$0F,$07,$07,$07,$07,$07,$07,$07,$07,$03,$03,$03,$03
       .byte $03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03
       .byte $03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03,$03
LF515: .byte $03
LF516: ; HMP0's
       .byte $00,$20,$20,$20,$20,$00,$20,$00,$10,$10,$20,$00,$10,$10,$10,$F0
       .byte $10,$10,$10,$00,$F0,$00,$10,$00,$00,$10,$00,$00,$F0,$00,$00,$10
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
LF555: ; HMM0
       .byte $00,$30,$20,$20,$10,$10,$10,$10,$10,$10,$10,$10,$10,$00,$10,$00
       .byte $10,$00,$10,$00,$00,$00,$10,$00,$00,$00,$00,$00,$00,$00,$00,$00
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
LF594: ; HMP1
       .byte $00,$E0,$E0,$E0,$E0,$00,$E0,$00,$F0,$F0,$E0,$00,$F0,$F0,$F0,$10
       .byte $F0,$F0,$F0,$00,$10,$00,$F0,$00,$00,$F0,$00,$00,$10,$00,$00,$F0
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
LF5D3: ; HMM1
       .byte $00,$D0,$E0,$E0,$F0,$F0,$F0,$F0,$F0,$F0,$F0,$F0,$F0,$00,$F0,$00
       .byte $F0,$00,$F0,$00,$00,$00,$F0,$00,$00,$00,$00,$00,$00,$00,$00,$00
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00
       .byte $00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00,$00

LF612: ; 2600 mode, graphic of box with "0" in it on keypress
      dc.b  %00000000
      dc.b  %01111110
      dc.b  %10000001
      dc.b  %10001001
      dc.b  %10010101
      dc.b  %10010101
      dc.b  %10010101
      dc.b  %10001001
      dc.b  %10000001
      dc.b  %01111110

LF61C: ; 2600 mode, graphic of box with "1" in it on keypress
      dc.b  %00000000
      dc.b  %01111110
      dc.b  %10000001
      dc.b  %10011101
      dc.b  %10001001
      dc.b  %10001001
      dc.b  %10011001
      dc.b  %10001001
      dc.b  %10000001
      dc.b  %01111110

;####################
; "ATARI" (six-digit score routine)
;####################
LF626:
	dc.b	%00000000
	dc.b	%11000000
	dc.b	%11000000
	dc.b	%11100000
	dc.b	%01100000
	dc.b	%01111111
	dc.b	%01111111
	dc.b	%00110000
	dc.b	%00110000
	dc.b	%00111000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011101
	dc.b	%00001111
	dc.b	%00001111
	dc.b	%00000111
	dc.b	%00000111

LF637:
	dc.b	%00000000
	dc.b	%00011001
	dc.b	%00011001
	dc.b	%00111001
	dc.b	%00110001
	dc.b	%11110001
	dc.b	%11110001
	dc.b	%01100001
	dc.b	%01100001
	dc.b	%11100001
	dc.b	%11000001
	dc.b	%11000001
	dc.b	%11000001
	dc.b	%10000001
	dc.b	%10000001
	dc.b	%00011111
	dc.b	%00011111

LF648:
	dc.b	%00000000
	dc.b	%10011000
	dc.b	%10011000
	dc.b	%10011100
	dc.b	%10001100
	dc.b	%10001111
	dc.b	%10001111
	dc.b	%10000110
	dc.b	%10000110
	dc.b	%10000111
	dc.b	%10000011
	dc.b	%10000011
	dc.b	%10000011
	dc.b	%10000001
	dc.b	%10000001
	dc.b	%11111000
	dc.b	%11111000
LF659:
	dc.b	%00000000
	dc.b	%00000011
	dc.b	%00000011
	dc.b	%00000111
	dc.b	%00000110
	dc.b	%11111110
	dc.b	%11111110
	dc.b	%00001100
	dc.b	%00001100
	dc.b	%00011100
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%10111000
	dc.b	%11110000
	dc.b	%11110000
	dc.b	%11100000
	dc.b	%11100000
LF66A:
	dc.b	%00000000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100001
	dc.b	%01100011
	dc.b	%01100111
	dc.b	%01101110
	dc.b	%01101111
	dc.b	%01100011
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100001
	dc.b	%01111111
	dc.b	%01111111
LF67B:
	dc.b	%00000000
	dc.b	%00110011
	dc.b	%01110011
	dc.b	%11100011
	dc.b	%11000011
	dc.b	%10000011
	dc.b	%00000011
	dc.b	%00000011
	dc.b	%00000011
	dc.b	%11000011
	dc.b	%11100011
	dc.b	%01100011
	dc.b	%01100011
	dc.b	%01100011
	dc.b	%11100011
	dc.b	%11000011
	dc.b	%00000011

;####################
; " NTSC " (spaces on sides to fill 6-digit score routine)
;####################
LF68C:  ; " "
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
LF694:  ; "N"
	dc.b	%01100110
	dc.b	%01100110
	dc.b	%01100110
	dc.b	%01100110
	dc.b	%01101110
	dc.b	%01111110
	dc.b	%01110110
	dc.b	%01100110
LF69C: ; "T"
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%01111110
	dc.b	%01111110
LF6A4:  ; "S"
	dc.b	%01111100
	dc.b	%01111110
	dc.b	%00000110
	dc.b	%00111110
	dc.b	%01111100
	dc.b	%01100000
	dc.b	%01111110
	dc.b	%00111110
LF6AC:  ; "C"
	dc.b	%00111110
	dc.b	%01111110
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01111110
	dc.b	%00111110
LF6B4:  ; " "
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000
	dc.b	%00000000

;####################
; " STELLA"
;####################
LF6BC:  ; "S"
	dc.b	%01111100
	dc.b	%01111110
	dc.b	%00000110
	dc.b	%00111110
	dc.b	%01111100
	dc.b	%01100000
	dc.b	%01111110
	dc.b	%00111110
LF6C4:  ; "T"
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%00011000
	dc.b	%01111110
	dc.b	%01111110
LF6CC:  ; "E"
	dc.b	%01111110
	dc.b	%01111110
	dc.b	%01100000
	dc.b	%01111110
	dc.b	%01111110
	dc.b	%01100000
	dc.b	%01111110
	dc.b	%01111110
LF6D4:  ; "L"
	dc.b	%01111110
	dc.b	%01111110
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
LF6DC:  ; "L"
	dc.b	%01111110
	dc.b	%01111110
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
	dc.b	%01100000
LF6E4:  ; "A"
	dc.b	%01100110
	dc.b	%01100110
	dc.b	%01100110
	dc.b	%01111110
	dc.b	%01111110
	dc.b	%01100110
	dc.b	%01111110
	dc.b	%00111100
;#####################


LF6EC: dc.b $08,$02,$09,$04


       ;###########
       ORG    $F884
       ;###########

LF884:
       LDA    $F88B,Y  ; $B9,$8B,$F8
       TAY             ; $A8
       JMP    $F026

LF88B: ; SIX error codes used by F884.
       dc.b   $A4      ; will display "X4"
       dc.b   $A1      ; will display "X1
       dc.b   $A2      ; will display "X2
       dc.b   $A0      ; will display "X0
       dc.b   $A3      ; will display "X3
       dc.b   $03      ; will display "03

LF891:
       LDX    #$7F    ;2
LF893: LDA    LF89F,X ;4
       STA    $0484,X ;5  PIA RAM
       DEX            ;2
       BPL    LF893   ;2
       JMP    $0484   ;3  PIA RAM

LF89F:
       ; DATA stored at $0484 (see $F891 code)
       dc.b $A9,$00,$AA,$85,$01,$95,$03,$E8,$E0,$2A,$D0,$F9,$85
       dc.b $02,$A9,$04,$EA,$30,$23,$A2,$04,$CA,$10,$FD,$9A,$8D,$10,$01,$20
       dc.b $CF,$04,$20,$CF,$04,$85,$11,$85,$1B,$85,$1C,$85,$0F,$EA,$85,$02
       dc.b $A9,$00,$EA,$30,$04,$24,$03,$30,$09,$A9,$02,$85,$09,$8D,$12,$F1
       dc.b $D0,$1E,$24,$02,$30,$0C,$A9,$02,$85,$06,$8D,$18,$F1,$8D,$60,$F4
       dc.b $D0,$0E,$85,$2C,$A9,$08,$85,$1B,$20,$CF,$04,$EA,$24,$02,$30,$D9
       dc.b $A9,$FD,$85,$08,$A9,$00,$85,$08,$85,$09,$85,$06,$85,$07
       JMP    $F980

LF90D: ASL    INPT0   ;5
       ROR            ;2
       ASL    INPT1   ;5
       ROR            ;2
       ASL    INPT2   ;5
       ROR            ;2
       ASL    INPT3   ;5
       ROR            ;2
       AND    #$F0    ;2
       RTS            ;6

LF91C: ASL    INPT4   ;5
       ROR            ;2
       ASL    INPT5   ;5
       ROR            ;2
       AND    #$C0    ;2
       RTS            ;6


     ; #################
     ; Subroutine-- delay 80 scanlines
Wait80Scanlines:
LF925: LDX    #$80    ;2
LF927: STA    WSYNC   ;3
       DEX            ;2
       BNE    LF927   ;2
       RTS            ;6
     ; #################


     ; #################
     ; Subroutine-- delay 8 scanlines
Wait8Scanlines:
LF92D: LDX    #$08    ;2 ; wait 8 scanlines
LF92F: STA    WSYNC   ;3
       DEX            ;2
       BNE    LF92F   ;2
       RTS            ;6
     ; #################

LF935: LDA    #$00    ;2
       STA    VBLANK  ;3
       LDX    #$FF    ;2
       STX    SWACNT  ;4
       LDA    #$FA    ;2
       STA    SWCHA   ;4
       JSR    LF925   ;6
       JSR    LF90D   ;6
       CMP    #$70    ;2
       BNE    LF97B   ;2
       LDA    #$F5    ;2
       STA    SWCHA   ;4
       JSR    LF925   ;6
       JSR    LF90D   ;6
       CMP    #$B0    ;2
       BNE    LF97B   ;2
       LDA    #$AF    ;2
       STA    SWCHA   ;4
       JSR    LF925   ;6
       JSR    LF90D   ;6
       CMP    #$D0    ;2
       BNE    LF97B   ;2
       LDA    #$5F    ;2
       STA    SWCHA   ;4
       JSR    LF925   ;6
       JSR    LF90D   ;6
       CMP    #$E0    ;2
       BNE    LF97B   ;2
       RTS            ;6
LF97B: ErrorCode 7


LF980: LDA    SWCHB   ;4 SWCHB is input only.  Storing a value to it
       TAX            ;2 that's the inverse of what's already stored
       EOR    #$FF    ;2 there should have no affect.  If it does,
       STA    SWCHB   ;4 raise an error code 1.
       CPX    SWCHB   ;4
       BEQ    LF993   ;2
LF98E: ErrorCode 1

LF993: LDA    SWACNT  ;4 Already configured to $00; all outputs
       ORA    SWBCNT  ;4 (no effect)
       BNE    LF98E   ;2
       LDA    SWCHB   ;4
       AND    #$03    ;2 (select and reset)
       EOR    #$03    ;2
       BEQ    LF9A9   ;2 if select or reset is down, error code 1.
       ErrorCode 1

LF9A9:
       ; In 7800-land, the code following these comments looks like JSR WaitVBOn
       ; But, in 2600-land, this called subroutine is much more devious.
       ; Let's take a look.
       ;LE723:
       ;   BIT    MSTAT
       ;   BPL    LE723
       ;   RTS
       ; If in 2600 mode, this is BIT INPT0 (a shadow of INPT0!)
       ; This causes an infinite loop until the cap in the 2600 is charged.
       ; This is accomplished by putting voltage into Controller 1, pin 5.
       ; The appropriate hardware to do this is a 47kOhm resistor tied
       ; from pin 5 to a common wire between pins 2 and four.
       ; The hardware explanations are explained completely, but in sections.
       ;
       ; So, hardware at this point =
       ; A) Some sort of voltage connection to pin 5 that charges the cap (for port 1).
       JSR    $E723   ;6


;#############################
; Joyport  block 1
; (this is the first port-intensive section we need to pass-- it's all related
;  so, it's easy to block off)

       ; This is a table representing what the next instructions before L9C9 check:
       ; # SWACNT # SWCHA #   VALUE   #  DESIRED  # 
       ; #========#=======#===========#===========#
       ; #   FF   #  00   # 0000|0000 # 0000|0000 #

       ; Remember some basics:
       ; IF SWACNT = 1, then output is on.
       ; {
       ;   IF SWCHA bit = 0 then corresponding output = 0, and output voltage on pins = 0
       ;   IF SWCHA bit = 1 then corresponding output = 1, and output voltage on pins = 5V
       ; }
       ; IF SWACNT = 0, then output is off; ports are input only.
       ; {
       ;   Default value of the pins and SWCHA values is "1", 5V, high, etc.
       ;   This is because we connect to ground to indicate that a joystick
       ;   direction has been moved, and then detect a logic zero.
       ; }

       LDA    #$60    ;2
       STA    INPT4   ;3
       LDX    #$00    ;2
       STX    VBLANK  ;3
       STX    SWBCNT  ;4
       DEX            ;2
       STX    SWACNT  ;4 A = all outputs
       INX            ;2
       STX    SWCHA   ;4 write $00
       JSR    Wait8Scanlines   ;6 (wait 8 scanlines)
       LDA    SWCHA   ;4 read (should return zero).
       BNE    JMPErrorCode6   ;2
       BEQ    LF9D1   ;2

LF9C9: dc.b $FA,$F5,$FA,$F5,$AF,$5F,$AF,$5F

LF9D1:
       ; Table explanation of all states in this code loop:
       ;
       ; # X # SWACNT # SWCHA #   VALUE   #  DESIRED  # 
       ; #===#========#=======#===========#===========#
       ; # 7 #   80   #  00   # 0111|1111 # 0101|1111 #
       ; # 6 #   40   #  00   # 1011|1111 # 1010|1111 #
       ; # 5 #   20   #  00   # 1101|1111 # 0101|1111 #
       ; # 4 #   10   #  00   # 1110|1111 # 1010|1111 #
       ; # 3 #   08   #  00   # 1111|0111 # 1111|0101 #
       ; # 2 #   04   #  00   # 1111|1011 # 1111|1010 #
       ; # 1 #   02   #  00   # 1111|1101 # 1111|0101 #
       ; # 0 #   01   #  00   # 1111|1110 # 1111|1010 #

       LDA    #$00    ;2
       STA    SWCHA   ;4
       LDY    #$80    ;2
       LDX    #$07    ;2
       TYA            ;2
LF9DB: STA    SWACNT  ;4
       LDA    LF9C9,X ;4
       CMP    SWCHA   ;4
       BNE    JMPErrorCode6   ;2
       TYA            ;2
       LSR            ;2
       TAY            ;2
       DEX            ;2
       BPL    LF9DB   ;2

       ; There are still 2 more cases that are run through in the
       ; next block of code:
       ;
       ; # SWACNT # SWCHA #   VALUE   #  DESIRED  # 
       ; #========#=======#===========#===========#
       ; #   FF   #  CC   # 1100|1100 # 0000|0000 #
       ; #   FF   #  33   # 0011|0011 # 0000|0000 #

       LDA    #$FF    ;2
       STA    SWACNT  ;4
       LDA    #$CC    ;2
       STA    SWCHA   ;4
       LDA    SWCHA   ;4
       BNE    JMPErrorCode6   ;2
       LDA    #$33    ;2
       STA    SWCHA   ;4
       LDA    SWCHA   ;4
       BNE    JMPErrorCode6   ;2
       BEQ    LFA0C   ;2

       ; Ok, before we move on, let's figure out what all of these crazy
       ; tables mean.  If we take all actual values and map all desired
       ; values side-by-side, we get the following graph:

       ; Left Port nibble:
       ; # VALUE  # DESIRED #
       ; #========#=========#
       ; #  0000  #  0000   #
       ; #  0001  #Dont care#
       ; #  0010  #Dont care#
       ; #  0011  #  0000   #
       ; #  0100  #Dont care#
       ; #  0101  #Dont care#
       ; #  0110  #Dont care#
       ; #  0111  #  0101   #
       ; #  1000  #Dont care#
       ; #  1001  #Dont care#
       ; #  1010  #Dont care#
       ; #  1011  #  1010   #
       ; #  1100  #  0000   #
       ; #  1101  #  0101   #
       ; #  1110  #  1010   #
       ; #  1111  #  1111   #

       ; Thankfully, if we look at the right nibble, we get the same table!
       ; This is good proof that the same circuit in Port 1 may be able to be
       ; applied to port 2.

       ; Breaking this down further, it seems that the simplest way to solve this
       ; problem is to OR alternate bits together.  So, D3 or'ed to D1, and D2 or'ed to D0.
       ; Translating bits to pins, D3 = Pin 4, D2 = pin 3, D1 = Pin 2, D0 = Pin 1
       ; So, instead of an or-gate, let's use a wired-or.  Simply wiring Pin 3 to Pin 1
       ; and Pin 2 to pin 4 will give us our result.

       ; So, our hardware now looks like this
       ; A) Some sort of voltage connection to pin 5 that charges the cap (for port 1).
       ; B) Pin 2-4 (both ports)
       ; C) Pin 3-1 (both ports)
       ; 
; End Joyport block 1
;#############################
; Joyport  block 2

JMPErrorCode6:
LFA07: ErrorCode 6

LFA0C: LDA    #$FF    ;2
       STA    VBLANK  ;3
       STA    SWACNT  ;4
       STA    SWCHA   ;4
       JSR    Wait80Scanlines   ;6
       LDA    SWCHA   ;4
       CMP    #$FF    ;2
       BNE    JMPErrorCode6   ;2
       JSR    LF90D   ;6
       BNE    JMPErrorCode7   ;2
       LDA    #$00    ;2
       STA    VBLANK  ;3
       JSR    LF90D   ;6
       BNE    JMPErrorCode7   ;2
       JSR    Wait80Scanlines   ;6
       JSR    LF90D   ;6
       EOR    #$F0    ;2
       BNE    JMPErrorCode7   ;2
       BEQ    LFA3F   ;2

JMPErrorCode7:
LFA3A:  ErrorCode 7

LFA3F: JSR    LF935   ;6
       LDA    #$55    ;2
       STA    SWCHA   ;4
       JSR    LF91C   ;6
       CMP    #$C0    ;2
       BNE    JMPErrorCode7   ;2
       LDA    #$00    ;2
       STA    SWCHA   ;4
       JSR    LF91C   ;6
       BNE    JMPErrorCode7   ;2
       LDA    #$50    ;2
       STA    SWCHA   ;4
       JSR    LF91C   ;6
       CMP    #$40    ;2
       BNE    JMPErrorCode7   ;2
       LDA    #$05    ;2
       STA    SWCHA   ;4
       JSR    LF91C   ;6
       CMP    #$80    ;2
       BNE    JMPErrorCode7   ;2
       LDA    #$FF    ;2
       STA    SWCHA   ;4
       LDA    #$40    ;2
       STA    VBLANK  ;3
       JSR    LF91C   ;6
       CMP    #$C0    ;2
       BNE    JMPErrorCode7   ;2
       LDA    #$00    ;2
       STA    SWCHA   ;4
       LDA    #$FF    ;2
       STA    SWCHA   ;4
       JSR    LF91C   ;6
       BNE    JMPErrorCode7   ;2
       LDA    #$00    ;2
       STA    VBLANK  ;3
       LDA    #$08    ;2
       STA    TIM1T   ;4
       LDA    INTIM   ;4
       BMI    JMPErrorCode5 ; 2 (LFAE5)
       NOP            ;2
       NOP            ;2
       LDA    INTIM   ;4
       BPL    JMPErrorCode5 ; 2 (LFAE5)
       LDA    #$01    ;2
       STA    TIM8T   ;4
       NOP            ;2
       LDA    INTIM   ;4
       BMI    JMPErrorCode5 ; 2 (LFAE5)
       NOP            ;2
       NOP            ;2
       LDA    INTIM   ;4
       BPL    JMPErrorCode5 ; 2 (LFAE5)
       LDA    #$01    ;2
       STA    TIM64T  ;4
       LDX    #$0A    ;2
LFABD: DEX            ;2
       BNE    LFABD   ;2
       LDA    INTIM   ;4
       BMI    JMPErrorCode5 ; 2 (LFAE5)
       NOP            ;2
       NOP            ;2
       NOP            ;2
       LDA    INTIM   ;4
       BPL    JMPErrorCode5 ; 2 (LFAE5)
       LDA    #$01    ;2
       STA    T1024T  ;4
       LDX    #$CA    ;2
LFAD4: DEX            ;2
       BNE    LFAD4   ;2
       LDA    INTIM   ;4
       BMI    JMPErrorCode5 ; 2 (LFAE5)
       NOP            ;2
       NOP            ;2
       NOP            ;2
       NOP            ;2
       LDA    INTIM   ;4
       BMI    LFAEA   ;2

JMPErrorCode5:
LFAE5:  ErrorCode 5

LFAEA: STA    WSYNC   ;3
       LDA    #$14    ;2
       STA    TIM1T   ;4
       STA    WSYNC   ;3
       LDA    INTIM   ;4
       BMI    LFAFD   ;2

       ErrorCode 7

LFAFD:
       JMP    $FC99

; End Joyport  block 2
;#############################




LFB00: STA    WSYNC   ;3
       DEX            ;2
       BNE    LFB00   ;2
       RTS            ;6

LFB06: CLD            ;2
       SEC            ;2
       SBC    #$2F    ;2
       LDY    #$02    ;2
LFB0C: INY            ;2
       SBC    #$0F    ;2
       BCS    LFB0C   ;2
       EOR    #$FF    ;2
       SBC    #$06    ;2
       JSR    LFB22   ;6
       STY    WSYNC   ;3
LFB1A: DEY            ;2
       BPL    LFB1A   ;2
       STA    RESP0,X ;4
       STA    HMP0,X  ;4
       RTS            ;6

LFB22: ASL            ;2
       ADC    #$00    ;2
       ASL            ;2
       ADC    #$00    ;2
       ASL            ;2
       ADC    #$00    ;2
       ASL            ;2
       ADC    #$00    ;2
       RTS            ;6

LFB2F: STA    CXCLR   ;3
       STA    WSYNC   ;3
       STA    WSYNC   ;3
       LDX    #$07    ;2
       LDA    $9B     ;3
       LSR            ;2
       STA    $9C     ;3
       LDA    #$80    ;2
       BCC    LFB41   ;2
       LSR            ;2
LFB41: STA    $9D     ;3
LFB43: LDA    CXM0P,X ;4
       AND    #$C0    ;2
       CPX    $9C     ;3
       BNE    LFB51   ;2
       CMP    $9D     ;3
       BNE    JMPErrorCode8 ; 2 (LFB6D)
       BEQ    LFB55   ;2
LFB51: ORA    #$00    ;2
       BNE    JMPErrorCode8 ; 2 (LFB6D)
LFB55: DEX            ;2
       BPL    LFB43   ;2
       INC    $9B     ;5
       RTS            ;6

LFB5B: STA    CXCLR   ;3
       STA    WSYNC   ;3
       STA    WSYNC   ;3
       LDX    #$07    ;2
LFB63: LDA    CXM0P,X ;4
       AND    #$C0    ;2
       BNE    JMPErrorCode8 ; 2 (LFB6D)
       DEX            ;2
       BPL    LFB63   ;2
       RTS            ;6

JMPErrorCode8:
LFB6D: ErrorCode 8

LFB72: LDA    #$00    ;2
       STA    PF1     ;3
       STA    PF2     ;3
       LDA    #$10    ;2
LFB7A: STA    PF0     ;3
       JSR    LFB9D   ;6
       ASL            ;2
       BNE    LFB7A   ;2
       STA    PF0     ;3
       LDA    #$80    ;2
LFB86: STA    PF1     ;3
       JSR    LFB9D   ;6
       LSR            ;2
       BNE    LFB86   ;2
       STA    PF1     ;3
       LDA    #$01    ;2
LFB92: STA    PF2     ;3
       JSR    LFB9D   ;6
       ASL            ;2
       BNE    LFB92   ;2
       LDA    PF2     ;3
       RTS            ;6

LFB9D: PHA            ;3
       LDA    #$31    ;2
       LDX    #$04    ;2
       JSR    LFB06   ;6
       LDY    #$01    ;2
LFBA7: STA    WSYNC   ;3
       STA    HMOVE   ;3
       STA    WSYNC   ;3
       STA    CXCLR   ;3
       STA    WSYNC   ;3
       LDA    #$C0    ;2
       STA    HMBL    ;3
       CPY    $9E     ;3
       BEQ    LFBD8   ;2
       LDA    #$00    ;2
       CMP    $A0     ;3
       BNE    LFBD0   ;2
       LDA    $9E     ;3
       CLC            ;2
       ADC    #$14    ;2
LFBC4: STA    $9F     ;3
       CPY    $9F     ;3
       BEQ    LFBD8   ;2
       BIT    CXBLPF  ;3
       BPL    LFBDF   ;2
       BMI    JMPErrorCode8 ; 2 (LFB6D)
LFBD0: LDA    $9E     ;3
       CLC            ;2
       ADC    $A1     ;3
       JMP    LFBC4   ;3
LFBD8: LDA    #$0C    ;2
       STA    $9B     ;3
       JSR    LFB2F   ;6
LFBDF: INY            ;2
       CPY    #$29    ;2
       BNE    LFBA7   ;2
       INC    $9E     ;5
       DEC    $A1     ;5
       DEC    $A1     ;5
       PLA            ;4
       RTS            ;6

LFBEC: LDA    #$40    ;2
       STA    $A9     ;3
       LDA    #$B8    ;2
       STA    $AA     ;3
       LDA    #$02    ;2
       STA    ENAM0   ;3
       STA    ENAM1   ;3
       STA    WSYNC   ;3
       STA    RESM0   ;3
       STA    WSYNC   ;3
       STA    RESM1   ;3
       LDA    #$80    ;2
       STA    $A7     ;3
       LDA    #$01    ;2
       STA    $A8     ;3
LFC0A: LDA    $A9     ;3
       LDX    #$00    ;2
       JSR    LFB06   ;6
       LDA    $AA     ;3
       INX            ;2
       JSR    LFB06   ;6
       STA    WSYNC   ;3
       STA    HMOVE   ;3
       STA    HMCLR   ;3
       STA    WSYNC   ;3
       LDA    $A7     ;3
       STA    GRP0    ;3
       LDA    $A8     ;3
       STA    GRP1    ;3
       LDA    #$02    ;2
       STA    RESMP0  ;3
       STA    RESMP1  ;3
       STA    WSYNC   ;3
       LDA    #$00    ;2
       STA    RESMP0  ;3
       STA    RESMP1  ;3
       LDA    $A2     ;3
       STA    HMM0    ;3
       LDA    $A3     ;3
       STA    HMM1    ;3
       STA    WSYNC   ;3
       STA    HMOVE   ;3
       STA    WSYNC   ;3
       LDA    $A4     ;3
       STA    HMM0    ;3
       LDA    $A5     ;3
       STA    HMM1    ;3
       LDY    #$00    ;2
LFC4D: STA    CXCLR   ;3
       STA    WSYNC   ;3
       CPY    $A6     ;3
       BEQ    LFC5F   ;2
       BIT    CXM0P   ;3
       BVS    JMPErrorCode8_2 ; 2 (LFC94)
       BIT    CXM1P   ;3
       BVS    JMPErrorCode8_2 ; 2 (LFC94)
       BVC    LFC67   ;2
LFC5F: BIT    CXM0P   ;3
       BVC    JMPErrorCode8_2 ; 2 (LFC94)
       BIT    CXM1P   ;3
       BVC    JMPErrorCode8_2 ; 2 (LFC94)
LFC67: STA    WSYNC   ;3
       STA    HMOVE   ;3
       STA    WSYNC   ;3
       INY            ;2
       CPY    #$08    ;2
       BNE    LFC4D   ;2
       LDA    $A9     ;3
       CLC            ;2
       ADC    #$10    ;2
       STA    $A9     ;3
       LDA    $AA     ;3
       SEC            ;2
       SBC    #$10    ;2
       STA    $AA     ;3
       LSR    $A7     ;5
       ASL    $A8     ;5
       INC    $A6     ;5
       LDA    $A6     ;3
       CMP    #$08    ;2
       BEQ    LFC8F   ;2
       JMP    LFC0A   ;3
LFC8F: LDA    #$00    ;2
       STA    $A6     ;3
       RTS            ;6

JMPErrorCode8_2:
LFC94: ErrorCode 8

LFC99: BIT    CXM0P   ;3
       BVS    JMPErrorCode8_2 ; 2 (LFC94)
       BIT    CXM1P   ;3
       BVS    JMPErrorCode8_2 ; 2 (LFC94)
       LDA    #$00    ;2
       STA    RESMP0  ;3
       STA    RESMP1  ;3
       STA    WSYNC   ;3
       STA    VBLANK  ;3
       STA    HMCLR   ;3
       STA    GRP0    ;3
       STA    GRP1    ;3
       STA    ENAM0   ;3
       STA    ENAM1   ;3
       STA    ENABL   ;3
       LDA    #$7C    ;2
       LDX    #$00    ;2
       JSR    LFB06   ;6
       LDA    #$7C    ;2
       INX            ;2
       JSR    LFB06   ;6
       LDA    #$7D    ;2
       INX            ;2
       JSR    LFB06   ;6
       LDA    #$7D    ;2
       INX            ;2
       JSR    LFB06   ;6
       LDA    #$7D    ;2
       INX            ;2
       JSR    LFB06   ;6
       STA    WSYNC   ;3
       STA    HMOVE   ;3
       JSR    LFB5B   ;6
       LDX    #$04    ;2
       LDA    #$FF    ;2
LFCE1: STA    HMP0,X  ;4
       DEX            ;2
       BPL    LFCE1   ;2
       STA    HMCLR   ;3
       LDX    #$0A    ;2
LFCEA: STA    WSYNC   ;3
       STA    HMOVE   ;3
       DEX            ;2
       BPL    LFCEA   ;2
       LDY    #$00    ;2
       STY    $9B     ;3
       DEY            ;2
       STY    GRP1    ;3
       STY    ENAM0   ;3
       JSR    LFB2F   ;6
       STY    GRP0    ;3
       INY            ;2
       STY    GRP1    ;3
       JSR    LFB2F   ;6
       STY    ENAM0   ;3
       DEY            ;2
       STY    ENAM1   ;3
       JSR    LFB2F   ;6
       STX    GRP1    ;3
       INY            ;2
       STY    GRP0    ;3
       JSR    LFB2F   ;6
       STY    GRP1    ;3
       STY    ENAM1   ;3
       DEY            ;2
       STY    GRP0    ;3
       STY    PF2     ;3
       JSR    LFB2F   ;6
       STY    ENABL   ;3
       INY            ;2
       STY    PF2     ;3
       JSR    LFB2F   ;6
       STY    GRP0    ;3
       STY    ENABL   ;3
       DEY            ;2
       STY    PF2     ;3
       STY    GRP1    ;3
       JSR    LFB2F   ;6
       STY    ENABL   ;3
       INY            ;2
       STY    PF2     ;3
       JSR    LFB2F   ;6
       STY    ENABL   ;3
       STY    GRP1    ;3
       DEY            ;2
       STY    ENAM0   ;3
       STY    PF2     ;3
       JSR    LFB2F   ;6
       STY    ENABL   ;3
       INY            ;2
       STY    PF2     ;3
       JSR    LFB2F   ;6
       LDA    #$FF    ;2
       STA    VDELBL  ;3
       JSR    LFB5B   ;6
       STY    VDELBL  ;3
       STY    GRP1    ;3
       STY    ENABL   ;3
       STY    ENAM0   ;3
       DEY            ;2
       STY    ENAM1   ;3
       STY    PF2     ;3
       JSR    LFB2F   ;6
       STY    VDELBL  ;3
       STY    ENABL   ;3
       INY            ;2
       STY    PF2     ;3
       JSR    LFB2F   ;6
       STY    ENAM1   ;3
       STY    VDELBL  ;3
       DEY            ;2
       STY    PF2     ;3
       JSR    LFB2F   ;6
       INC    $9B     ;5
       STY    GRP0    ;3
       STY    GRP1    ;3
       INY            ;2
       STY    PF2     ;3
       STY    ENABL   ;3
       JSR    LFB2F   ;6
       STY    GRP0    ;3
       STY    GRP1    ;3
       DEY            ;2
       STY    ENAM0   ;3
       STY    ENAM1   ;3
       JSR    LFB2F   ;6
       INY            ;2
       STY    ENAM0   ;3
       STY    ENAM1   ;3
       JSR    LFB5B   ;6
       LDX    #$01    ;2
       STX    $9E     ;3
       DEX            ;2
       STX    CTRLPF  ;3
       STX    $A0     ;3
       DEX            ;2
       STX    ENABL   ;3
       JSR    LFB72   ;6
       LDX    #$01    ;2
       STX    $9E     ;3
       STX    CTRLPF  ;3
       STX    $A0     ;3
       LDY    #$27    ;2
       STY    $A1     ;3
       JSR    LFB72   ;6
       LDA    #$00    ;2
       STA    PF2     ;3
       STA    $A6     ;3
       LDA    #$40    ;2
       STA    $A2     ;3
       LDA    #$D0    ;2
       STA    $A3     ;3
       LDA    #$F0    ;2
       STA    $A4     ;3
       LDA    #$10    ;2
       STA    $A5     ;3
       JSR    LFBEC   ;6
       LDA    #$08    ;2
       STA    REFP0   ;3
       STA    REFP1   ;3
       LDA    #$D0    ;2
       STA    $A2     ;3
       LDA    #$40    ;2
       STA    $A3     ;3
       LDA    #$10    ;2
       STA    $A4     ;3
       LDA    #$F0    ;2
       STA    $A5     ;3
       JSR    LFBEC   ;6
       LDA    #$00    ;2
       STA    REFP0   ;3
       STA    REFP1   ;3
       JMP    LF194   ;3


        dc.b   " - (C) 1984 GCC VIA THE ALIEN "
        dc.b   " - (C) 1984 ATARI VIA RON AND JERRY  - LONG LIVE MARIA!  "

LFE4E:
	; INTERRUPT VECTOR
	JMP.ind ($008C);5


LFE51:
	; BRK vector
	JMP.ind ($008E);5


	; *****************************
	;  Empty space padded with $FF
	; *****************************

	ORG	$FF80

	; reserved for encryption
        dc.b   $05,$86,$74,$A4,$4C,$AC,$09,$56
        dc.b   $AD,$62,$36,$61,$1A,$8D,$EA,$A2
        dc.b   $4B,$73,$C7,$66,$A8,$4F,$E6,$D7
        dc.b   $2A,$8F,$E3,$80,$96,$77,$90,$F7

        dc.b   $7A,$5C,$A0,$27,$9D,$67,$E8,$8D
        dc.b   $58,$64,$56,$22,$C9,$3C,$F6,$5B
        dc.b   $FB,$94,$ED,$E3,$E3,$9D,$FA,$DD
        dc.b   $CD,$DB,$ED,$89,$2D,$20,$65,$7C

        dc.b   $1F,$A3,$F5,$EC,$42,$79,$55,$E9
        dc.b   $7C,$40,$25,$41,$FE,$C7,$E4,$9A
        dc.b   $D7,$51,$D7,$31,$9C,$4E,$56,$73
        dc.b   $AD,$2A,$F7,$38,$FB,$3F,$AE,$EE

        dc.b   $30,$A4,$9F,$30,$A5,$23,$E9,$B0
        dc.b   $48,$2C,$83,$A6,$2E,$8C,$D2,$D6
        dc.b   $96,$C0,$DB,$12,$46,$AC,$E7,$E7


	ORG	$FFF8

        dc.b   $FF     ; region verification
        dc.b   $E7     ; Starts at $E000 (i.e. 8K rom)

	; Interrupt Vector
        dc.w   $FE4E

	; START Vector
        dc.w   $F000

	; BBK Vector
        dc.w   $FE51