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# Homework 6

Homework 6

Due 05/13
Weight: 12%

1. 1. Problem 1
2. 2. Problem 2
3. 3. Problem 3
4. 4. Problem 4
5. 5. Problem 5

20 points each

### 1.  Problem 1

Consider the example single-error-correcting code with a minimum Hamming distance of three example in the ECC1 handout.

1. Find the codewords for these datawords :
1. 00000111
2. 10001111
3. 11001010
4. 10101001
2. For this part assume that at most one bit can be in error. If the following values are read from the memory (stored using the above encoding in the order ` C3 C2 C1 C0 b7 b6 b5 b4 b3 b2 b1 b0`), find the correct dataword.
1. 0011 11111111
2. 0011 01111111
3. 1110 00011111
4. 0111 10001011

### 2.  Problem 2

Multiply the following 2's complement 8-bit numbers using Booth's algorithm. Show the steps as shown in Fig. 3.11.2 in Section 3.11 of the In More Depth of the COD3e CD. Verify your answer by computing A, B and the product in decimal.

Multiplicand A = 0010 1011 Multiplier B = 0101 0101

### 3.  Problem 3

Divide the following positive numbers using the restoring division algorithm. Show all the steps as in Figure 3.12 on page 186 of the text book.

Verify your answer by converting A and B and your result (A / B) and remainder to decimal.

A = 0101 1000 B = 0101

### 4.  Problem 4

1. Show the IEEE 754 binary representation for the floating point number 17.384 (base 10)
2. Convert the following number given in IEEE 754 binary representation to the equivalent decimal number
`0000 0100 0000 0100 1001 0000 1001 0110`

### 5.  Problem 5

Write tests for mem_system_perfbench.v carried over from hw5. If you already wrote address traces for hw5, you can simply resubmit - simply say see hw5 in your handed in homework.

This is a more carefully constructed testbench that is meant to check the performance of your design. For example, is your cache reporting cache hits and misses correctly. Are the requests being serviced in the correct amount of time etc. This testbench takes as input a memory address trace in a file called mem.addr. This file must be in the same location as your verilog files. An example mem.addr file is provided. The format of the file is the following:

• Each line represents a new request
• Each line has 4 numbers separated by a space
• The numbers are: Wr Rd Addr Value

You must write different address traces to test your module and prove that it does implement the cache correct. Determining what to test and show is an important part of this problem. Carefully document and show in your homework, what cases you are testing. Pick representative inputs from this testbench, by examining the waveforms. You must handin annotated waveforms to prove that your design works correctly during hits, misses, writebacks, and refills.