|CS552 Course Wiki: Spring 2017||Main »
On this page... (hide)
This page is meant for recording student experiences on tool related problems you faced and how you solved them. You cannot post homework solutions here! Use the course login and password to edit this page.
If you faced a tricky problem with the tools or if you have discovered a tip post it here. I have included one entry to get this going. This is a student driven page. Neither the instructor nor the TA will be adding anything to this page.
If you want to get fancy with the content you type, full description of Pmwiki's markup language is here.
I set the times on the forces to be "absolute." When I did that, it basically erased the force that was at the times I was trying to run the forces at, and replaced them with the correct ones. I also exited quicksim and re-ran it, this also worked.
So this was my mistake earlier today and I just want to clarify. What actually happened is when I was trying to simulate the 4-1 mux on Quicksim, I was having difficulty getting the S(1:0) values to be something other than 0 or 1. It turns out what happens is (I think), that when you set 2 forces on an input at the same time, Quicksim leaves the force you set first at the time you desire (say 0 - 180 ns). Then, at 180 ns, it starts the next values (forces) you want. So in my case, when I was simulating it for 180 ns, it didn't show the values (forces) I had set for 2_11 or 2_10. So how do you get around this? If you "check" the absolute time box, it will overwrite the force at the times you specify. Or, you can close out quicksim, choose not to save, and restart quicksim, inputting the correct values this time. It will also "supposedly" (as in I read from my ECE/CS 352 Mentor Graphics Tutorial) work if you Reset the forces, which I believe is Simulation > Reset. Thus you can set bus values to be something larger than 1, as long as you have the proper number of bits to do so. -Matt Sinclair
I ran into a problem where if I saved my file and then logged on later to edit it it would say that the file was non-editable and to change the edit setting...well I went to where the edit mode on/off select was and that didn't work. If you find yourself in the same boat what did work, however, was if you use this sequence:
If you trying to remotely access the CS machines from a home machine using ssh -X and you get a font error, then it means you don't have the required fonts on your home machine.
There is a short term solution to this problem.
Copy over the files in
prompt % xset fp+ /home/username/mentorfonts prompt % ssh -X CSlogin@emperorXX.cs.wisc.edu emperorXX() % dmgr
If you run into problems with this approach, the instructor or the TA may be able to provide more help, but not guaranteed.
Benjamin Fortin adds that for MacOS
Also see this. This link could potentially help address the problem if you are connecting from a Windows machine.
On your local machine, the command is:
prompt% scp remote_username@emperorXX.cs.wisc.edu:/s/mentor/MGC_HOME-2004/registry/fonts/* home/local_username/mentorfonts
Where 'remote_username' is your cs login, XX is a number from 01 to 40, and 'local_username' is your local login name. This command also implies that the directory /home/local_username/mentorfonts has already been created.
Either at a CS lab computer or at home using ssh use the following command:
prompt% tar -cvzf file.tgz *
This will create an archive file called "file.tgz". When you run this command, all of the files and directories in the current directory are added to the archive, so make sure you only have the files you need to archive in this directory.
This error is known as a bug of ModelSim 6.2 and 6.3 when one wants to simulate a Verilog module. This bug occurs during the optimization process while the simulation mode is starting. The outcome is that you will not see some or all signals of that module and some other submodules (inputs, outputs, or/and internal signals) in the Objects window.
If you encounter this error, though it does not usually happen, then here are some solutions so far.
Set the variable VoptFlow in the modelsim.ini to 0.
Create a new project and add the Verilog files from the old project to this new one.
There are 2 ways:
From here you need to go to the correct homework folder. Either of these ways should show you what you turned in.
Copy the following into a file, filename.sh:
#! /bin/csh -f foreach d (*.v) java Vcheck $d > $d.vcheck.out end
Close the file and run chmod +x filename.sh. Then type ./filename.sh. This will Vcheck all the .v files in your current directory, assuming your Vcheck class files are also located there.
|Page last modified on January 19, 2013, visited 349 times|