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CS755: VLSI Design - Fall 2009

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CS755: VLSI Design - Fall 2009

Instructor: Karu Sankaralingam; URL: http://www.cs.wisc.edu/~karu
Email: karu@cs.wisc.edu Include 755 in subject line
Meeting time: TR 11:00-12:15, CS Building 1263
Office hours: M noon-1:40pm, Th 12:15-2
TA: Shi-Ting Zhou, szhou5@wisc.edu, Office Hours: M 3-4pm, W 2-3pm, F 1-2pm, Office 1301
Course URL: http://www.cs.wisc.edu/~karu/courses/cs755/fall2009/wiki
Mailing list: compsci755-1-f09@lists.wisc.edu

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While many of today's chips can be designed using high level hardware programming languages, an understanding of the underlying circuits is necessary to build high performance and low power systems. This course focuses on VLSI circuit design for modern CMOS technologies. The topics covered in this course include:

  • logic design,
  • high level design (Verilog),
  • basic transistor operation,
  • circuit families (static CMOS, dynamic circuits, domino),
  • clocking,
  • circuit simulation,
  • physical design, and computer-aided design tools.

The course will include regular assignments and an end-of-term design project. For the project you will design a full 16-bit processor at the transistor level and analyze area, timing, and power.

In this course, we will understand the underlying technology principles and primitives that drive architectural decisions. This is not a course on analysis of architecture and micro-architecture trade-offs. We will understand low-level circuit behavior, build high level models for analysis and use CAD tools to build processor components. At the end of this course you will be able to appreciate processor design at different levels. To summarize, take a look at this paper: Pham et al., Overview of the Architecture, Circuit Design, and Physical Implementation of a First-Generation Cell Processor, IEEE Journal of Solid-State Circuits, January 2006. At the end of this course, you will understand all of those pieces. (paper available from wisc.edu machines).

Detailed topics covered:

  1. CMOS Fabrication and its implications
  2. Elementary CMOS logic design and layout
  3. MOS Device Equations
  4. CMOS Logic: Quantiative Analysis
  5. Logical Effort
  6. Interconnect
  7. Simulating Circuits
  8. Adders, Mathematical treatment of parallel prefix computation
  9. Advanced static gate design
  10. Alternatives to static logic
  11. Sequential Design
  12. Datapath
  13. SRAMs
  14. CAMs, ROMs, and PLAs
  15. Circuit Pitfalls
  16. Testing
  17. Case Studies of real processors.

Prerequisites

CS/ECE 552 or equivalent. Email instructor. Self check requirements


Page last modified on September 16, 2009, visited times

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