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Karu Sankaralingam
aka Karthikeyan Sankaralingam
Assistant Professor
Computer Sciences and
Electrical and Computer Engineering

karu@cs.wisc.edu, Phone: (608) 890-0121
Fall Office Hours: M noon-1:40, Th 12:15-2:00

Research (CV)

  • I lead the Vertical Research Group.
  • Interests: Computer Architecture, Microarchitecture, VLSI, computing devices.
  • I am looking for motivated graduate and undergraduate students to work with: read this.

Recent Publications

  • PLUG: Flexible Lookup Modules for Rapid Deployment of New Protocols in High-speed Routers, SIGCOMM 2009, pdf
  • Toward A Multicore Architecture for Real-time Raytracing, MICRO-41, 2008, pdf
  • MapReduce for the Cell B.E. Architecture. IBM Journal of Research and Development, Vol 53, issue 5, 2009. details
  • Distributed Microarchitectural Protocols in the TRIPS Prototype Processor, MICRO-39, 2006, pdf

Research Summary

I am interested in microarchitecture, architecture, and software issues for future computation systems and lead the Vertical research group. Technology constraints of unreliable hardware, process variations, and energy efficiency are going to define computation substrates of the future. My research goal is to understand the constraints of the underlying technology and applications and use these to derive architecture and microarchitecture solutions. Vertical Research Group Page.

Students

Teaching (Teaching evaluations)

Education

  • B.Tech - Indian Institute of Technology, Madras, 1999
  • MS - The University of Texas at Austin, August 2006
  • PhD - The University of Texas at Austin, December 2006

Bio: Karu Sankaralingam (http://www.cs.wisc.edu/~karu) is an assistant professor in the computer sciences department at the University of Wisconsin-Madison, where he also leads the Vertical Research Group (http://www.cs.wisc.edu/vertical/). His research interests include microarchitecture, architecture, and software issues for massively parallel computation systems. He is a recipient of the NSF CAREER award. He earned a PhD from The University of Texas at Austin in December 2006, and was the lead student architect of the TRIPS chip, a 170 million transistor chip.


Page last modified on November 18, 2009