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Karu Sankaralingam
aka Karthikeyan Sankaralingam
Assistant Professor
Computer Sciences and
Electrical and Computer Engineering
karu@cs.wisc.edu, Phone: (608) 890-0121
Spring Office Hours: T,Th 1-2:30pm

Research (CV)

• I lead the Vertical Research Group.
• Interests: Computer Architecture, Microarchitecture, VLSI, computing devices.
• If you are a graduate or undergraduate student interested in pursuing research with me, read this.

Recent Publications

• A General Constraint-centric Scheduling Framework for Spatial Architectures, PLDI 2013, pdf
• Power Struggles: Revisiting the RISC vs. CISC Debate on Contemporary ARM and x86 Architectures, HPCA 2013. pdf, extended tech-report, web-page
• ConAir: Featherweight Concurrency Bug Recovery Via Single-Threaded Idempotent Execution, ASPLOS 2013, pdf
• Idempotent Code Generation: Implementation, Analysis, and Evaluation, CGO 2013, pdf
• Power Challenges May End The Multicore Era, Communications of ACM Feb 2013 Research Highlights, ACM link, short video
• DySER: Unifying Functionality and Parallelism Specialization for Energy Efficient Computing, IEEE Micro Sep '12, IEEE link
• iGPU: Exception Support and Speculative Execution on GPUs, ISCA 2012, pdf
• Static Analysis and Compiler Design for Idempotent Processing, PLDI 2012, pdf
• Idempotent Processor Architecture, MICRO 2011, pdf
• Design, Integration, and Implementation of the DySER Hardware Accelerator into OpenSPARC, HPCA 2012, pdf
• Dark Silicon and the End of Multicore Scaling, ISCA 2011, pdf; IEEE Micro Top Picks 2012,Invited ACM TOCS, Communications of ACM Research Highlights 2013
• Sampling + DMR: Practical and Low-overhead Permanent Fault Detection, ISCA 2011, pdf
• Challenge Benchmarks That Must be Conquered to Sustain the GPU Revolution, EAMA 2011, pdf
• Dynamically Specialized Datapaths for Energy Efficient Computing, HPCA 2011, pdf
• Relax: An Architectural Framework for Software Recovery of Hardware Faults, ISCA 2010, pdf
• A Fast and Highly Accurate Path Delay Emulation Framework for Logic-Emulation of Timing Speculation, ITC 2010, pdf
• PLUG: Flexible Lookup Modules for Rapid Deployment of New Protocols in High-speed Routers, SIGCOMM 2009, pdf
• Toward A Multicore Architecture for Real-time Raytracing, MICRO-41, 2008, pdf

Research Summary

I am interested in microarchitecture, architecture, and software issues for future computation systems and lead the Vertical research group. Technology constraints of unreliable hardware, process variations, and energy efficiency are going to define computation substrates of the future. My research goal is to understand the constraints of the underlying technology and applications and use these to derive architecture and microarchitecture solutions. Vertical Research Group Page.

Students

• Venkatraman Govindaraju
• Chen-han Ho
• Sung Jin Kim
• Tony Nowatzki
• Emily Blem
• Raghu Balasubramanian
• Jai Menon
• Newsha Ardalani
• Vijay Thiruvengadem
• Michael Sartin-Tarm (under-grad)

Alumni

• Shuou Nomura (previously visiting research scholar, now at Toshiba)
• Garret Staus, BS First employment: Intel
• Amit Kumar, MS, First employment: Intel
• Jesse Benson, MS, First employment: Microsoft
• Matt Sinclair, PhD Student UIUC
• Samuel Wasmundt
• Chris Frericks, MS, First employment: Samsung
• Eric Harris, MS, First employment: Samsung
• Ryan Cofell, MS
• Marc de Kruijf, PhD, First employment: Google
• Zachary Marzec, MS, First employment: Qualcomm

Teaching (Teaching evaluations)

• Spring 2013: CS552 - Introduction to Computer Architecture
• Spring 2014: CS252 - Introduction to Computer Engineering
• Previous courses
  • Fall 2012: CS752 - Advanced Computer Architecture
  • Spring 2012: CS252 - Introduction to Computer Engineering
  • Fall 2011: CS758 - Building Microprocessors
  • Spring 2011: CS552 - Introduction to Computer Architecture
  • Fall 2010: CS752 - Advanced Computer Architecture I
  • Fall 2009: CS755 - VLSI Design
  • Spring 2009: CS552 - Introduction to Computer Architecture
  • Fall 2008: CS755 - VLSI Design
  • Spring 2008: CS552 - Introduction to Computer Architecture.
  • Fall 2007: CS752 - Advanced Computer Architecture I.
  • Spring 2007: CS752 - Advanced Computer Architecture I.

Education

• B.Tech - Indian Institute of Technology, Madras, 1999
• MS - The University of Texas at Austin, August 2006
• PhD - The University of Texas at Austin, December 2006

Bio: Karu Sankaralingam (http://www.cs.wisc.edu/~karu) is an assistant professor in the computer sciences department at the University of Wisconsin-Madison, where he also leads the Vertical Research Group (http://www.cs.wisc.edu/vertical/). His research interests include microarchitecture, architecture, and software issues for massively parallel computation systems. He is a recipient of the IEEE TCCA Young Computer Architecture Award in 2012, and an NSF CAREER award in 2009. He earned a PhD from The University of Texas at Austin in December 2006, and was the lead student architect of the TRIPS chip, a 170 million transistor chip.