| Format | Effect | Notes | |
|---|---|---|---|
| la | R, label | R ← label | M[i] = contents of the (aligned) |
| li | R, constant | R ← constant | word of memory beginning at location i. |
| lw | R, address | R ← M[address] | m[i] i= contents of the byte of memory at location i. |
| lb | R, address | R ← (m[address]7)24 || m[address] | The memory address can take several forms: |
| lbu | R, address | R ← 024 || m[address] |
label – absolute address |
| sw | R, address | R → M[address] |
(Rb) – base address |
| sb | R, address | [R]7..0 → m[address] |
I (Rb) – base displacement |
| add | D, S1, S2 | D ← S1 + S2 | D specifies a general register |
| sub | D, S1, S2 | D ← S1 – S2 | where the result is placed. |
| mul | D, S1, S2 | D ← S1 * S2 | |
| div | D, S1, S2 | D ← S1 / S2 (integer division) | S1 is the contents of a general register. |
| rem | D, S1, S2 | D ← S1 % S2 (remainder) | |
| and | D, S1, S2 | D ← S1 AND S2 | S2 can be either the contents of a |
| or | D, S1, S2 | D ← S1 OR S2 | general register or a constant. |
| xor | D, S1, S2 | D ← S1 XOR S2 | |
| nor | D, S1, S2 | D ← S1 NOR S2 | If S1 is not present, then S1 is the same as D. |
| not | D, S1 | D ← NOT S1 | |
| move | D, S2 | D ← S2 | |
| sll | Rd, Rt, AMT | Rd ← [Rt]31 – AMT..0 || 0AMT | AMT may be either a general register or a constant. |
| srl | Rd, Rt, AMT | Rd ← 0AMT || [Rt]31..AMT | 0 ≤ AMT < 32. |
| sra | Rd, Rt, AMT | Rd ← ([Rt]31)AMT || [Rt]31..AMT | |
| l.s | F, address | F ← M[address] | F specifies a floating point register |
| s.s | F, address | F ← M[address] | where the result is placed. |
| li.s | F, constant | F ← constant | |
| mov.s | F, F1 | F ← F1 | W specifies a floating point register |
| add.s | F, F1, F2 | D ← F1 + F2 | whose content is to be interpreted as |
| sub.s | F, F1, F2 | D ← F1 – F2 | a two’s compliment integer. |
| mul.s | F, F1, F2 | D ← F1 * F2 | |
| div.s | F, F1, F2 | D ← F1 / F2 | F1, F2, and G each specify a floating point |
| cvt.s.w | G, W | G ← W | register whose content is to be interpreted |
| cvt.w.s | W, G | W ← G | as a single-precision floating point number. |
| mfc0 | R, C | R ← C | R is a general register. |
| mtc0 | R, C | R → C | F is a floating point register. |
| mfc1 | R, F | R ← F | C is a control register. |
| mtc1 | R, F | R → F | |
| b | label | PC ← label | General Notes |
| beq | Rs, Rt, label | if (Rs = Rt), then PC ← label | (1) R, Rb, Rd, and Rt are the contents of a general register. |
| bne | Rs, Rt, label | if (Rs ≠ Rt), then PC ← label | (2) || (parallel lines symbol) indicates concatenation of bit fields. |
| blt | Rs, Rt, label | if (Rs < Rt), then PC ← label | (3) Superscripts indicate repetitions of a binary value. |
| bgt | Rs, Rt, label | if (Rs > Rt), then PC ← label | (4) Subscripts indicate bit positions (Little-Endian) of sub-field. |
| ble | Rs, Rt, label | if (Rs ≤ Rt), then PC ← label | |
| bge | Rs, Rt, label | if (Rs = Rt), then PC ← label | Adapted from: |
| bltz | R, label | if (Rs < 0), then PC ← label | Goodman, James, and Karen Miller. |
| bgtz | R, label | if (Rs > 0), then PC ← label | |
| blez | R, label | if (Rs ≤ 0), then PC ← label |
New York: Oxford UP, Incorporated, 1993. 390-91. |
| bgez | R, label | if (Rs ≥ 0), then PC ← label | Layout by Joe Kohlmann. |
| bnez | R, label | if (Rs ≠ 0), then PC ← label | |
| beqz | R, label | if (Rs = 0), then PC ← label | |
| j | address | PC ← address | Address may be a label or a register. |
| jr | R | PC ← R | |
| jal | address | R31 ← PC + 4; PC ← address | |
| jalr | Rd, Rs | Rd ← PC + 4; PC ← Rs | |
| getc | R | R ← 024 || input7..0 | S may be either a general register or a label. |
| putc | R | R7..0 → output | If S is a general register, effective address is |
| puts | S | Print string beginning at effective address | contents of S; if S is a label, effective address is S. |