CS/ECE 752-1 Homework #2

CS/ECE 752: Advanced Computer Architecture I

Fall 1999 Offering

Instructor Mark D. Hill and Teaching Assistant Collin McCurdy

Homework #2

Due: Tuesday, October 5, 1999

You should do the work alone. No late assignments will be accepted.

Problem 1

(4 points) H&P Problem 5.1ab (but not c and d)

Problem 2

(4 points) Consider an instruction set architecture that supports an "infinite stack" with instructions that can only access the top two elements of the stack. Discuss how you would design a cache to keep some elements of the stack close to the processors while others reside in memory. Focus on how your design might differ from a conventional cache.

Problem 3

(12 points) This problem is designed to acquaint you with simplescalar, a powerful simulation tool designed here at UW by former student Todd Austin. Before starting, it would be a good idea to look through the tech-report description of the tool, which can be found here.

Setup

Add the following to your ~/.cshrc file (after your path definition):
```
    setenv SSHOME /unsup/ss-2.0
    set path = ($path $SSHOME/bin)
```
To ensure your path is updated: source ~/.cshrc.
Copy the directory ~cs752-1/public/hw2-ss/ somewhere writable by you. Inside, you should find 3 files: Makefile, matmul.c, matmul2.c.
Open the Makefile in a text editor. Decide whether you are on a "little-endian" or "big-endian" machine and choose the appropriate definition for the CC macro by commenting out the other. I'm on a little-endian machine so I comment out "CC = ssbig-na-sstrix-gcc". Typically, you'll be working on either an intel-based machine (sunx86) which would be little-endian, or a sparc (sun4x), big-endian.
Make matmul and matmul2 (just type "make" at the prompt). If you get an error you may have made the wrong "-endian" choice; choose the other and try again. If you still get an error, are you sure your path was updated?

Part I

Run sim-cache on matmul with the default settings. Runs shouldn't take longer than 3-5 minutes. Simplescalar prints performance statistics to stderr which can be redirected to a file using ">&.", so your command line might look like:

    sim-cache matmul >& matmul.txt

Make note of results relevant to the memory hierarchy. In particular, what is the level one data cache miss ratio?

Part II

Now run sim-cache on matmul2, again with the default settings. Which results changed? Why?

Part III

You should have noted a fairly substantial performance improvement between matmul and matmul2. You could actually improve the cache performance even further. How? You don't have to implement it, just give an overview of the changes you would make.

Food for thought

If you have extra time...

While the number of data accesses remained constant between matmul and matmul2, the number of instructions executed changed. Why?
sim-cache doesn't directly measure the cycle count for a given execution, but you can compute it. How many more cycles do you expect matmul to take than matmul2 (using the default latencies found on page 9 of the tech-report)?
sim-outorder does measure cycle counts, in addition to a great many other things. Run sim-outorder on both matmul and matmul2, using the default latencies. How accurate was your computation?