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CS/ECE 757 Parallel Computer Architecture (Spring 2016)

Officially: Advanced Computer Architecture II (Section 1 of 1)
Instructor: Mark D. Hill; URL: http://www.cs.wisc.edu/~markhill
Meeting time: 3534 Engineering Hall, 1:00 - 2:15 PM, MWF
Course URL: http://pages.cs.wisc.edu/~markhill/cs757/Spring2016/wiki/

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Motivation

''The distant threat has come to pass. For 30 years or more, pundits have claimed that parallel computers are the inexorable next step in the evolution of computers. --Jim Larus & Ravi Rajwar, Transactional Memory, Morgan & Claypool, Editor Mark Hill, 2007''

Multicore processors multiplying two ways: in market share and cores per chip. Mainstream vendors are shipping chips with 4, 6, and 8 cores, often with multithreading support. More aggressive chips target 48 to 336 non-traditional cores.

CS 757 will help you understand how multicore and other parallel systems work. We will mix some programming with detailed study of the hardware architectures.

This course will be modeled after Hill's Spring 2014 offering of CS/ECE 757.

Prerequisite Change

This offering of CS/ECE 757 will use CS/ECE 552 (or basic architecture knowledge) as its principal prerequisite. It does not require CS/ECE 752 (despite what the course catalog and timetable say). This is because our focus will be on parallelism issues, not details of core pipelines.

Instructions for First Lecture (Wed Jan 20, 2016)


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