Instruction Merging and Multimedia Technology

by Matt McCormick

In recent years several microprocessor manufacturers have begun to release new hardware products that allow multiple pieces of data to be packed into a single register and then with one instruction do work on all of that data. The concept is simple, if most of the data is 8-bits long (or 16 or 32) why not pack 8 (or 4 or 2) pieces of data into a 64-bit register and achieve considerably higher performance from a given number of instructions. This is often referred to as single instruction, multiple data (SIMD) [Flynn]. The main purpose of these new architectures is to enhance multimedia applications. While these architectures may provide the greatest opportunity for improvement in this environment [PCmag], there is no reason to limit the application of such architecture to merely multimedia applications. Consider the fact that many programs are written assuming the use of 32-bit integers. This means that many math and logical operations in a program can potentially be combined with a second instruction doing the same type of operation. If the programmer intended to use short (16-bit) or byte size integers, the potential number of instructions that can be combined should be even greater - and not just for multimedia applications. This paper presents an algorithm for a back-end compiler to search through a set of instructions and determine possible instruction merging opportunities.

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