Micro-30 SimpleScalar Tutorial

Todd AustinDoug Burger
Microcomputer Research Labs Computer Sciences Dept.
Intel Corporation University of Wisconsin-Madison

The tutorial has come and gone, and the feedback we received indicated that people found it to be quite useful. As per numerous requests, we are making the slides available on the web. We have made available the list of registered attendees. The slides for sections 1, 6, 7, and 8 are all in distinct files. The slides part of section 2, and 3, 4, and 5, are in Todd's big "bin o' slides", in little particular order. But all the material presented (and then some) is there.

  • Welcome and overview (0:15)
  • Using SimpleScalar (0:45)

    The next three sections, plus half of section 2, in Postscript, 2/page PS, PDF, 2/page PDF:
  • Hacking sim-outorder (0:50)
  • Writing your own simulator (0:50)

  • Memory extensions (0:20)
  • Limitations to SimpleScalar (0:15)
  • Wrapup and discussion (0:15)

    Here is the original call for participation:

    In conjunction with MICRO-30, we are pleased to announce a tutorial on the internals of the SimpleScalar microprocessor simulation tool suite. The tutorial will be held before the 30th Annual International Symposium on Microarchitecture (MICRO-30), in the Royal Ballroom A&B of the conference hotel. Here is a map of the conference hotel, showing the ballroom.

    The tutorial will be held on Sunday, November 30 from 2:00-6:00 pm. Registration is free, but preference will be given to those who have registered for the conference. Directions to the hotel and registration information for the conference can be obtained on the main conference page.

    We are targeting the tutorial primarily at architecture researchers who have no more than a working familiarity with the tools (i.e., researchers who understand the simulator code thoroughly may not find the tutorial as useful as do other participants). The content of the tutorial will be as follows:

    • Tool set overview
    • Simulator internals
    • Performance optimizations
    • Compiler modifications
    • Memory hierarchy extensions

    We also plan to make prereleases of the memory hierarchy and shared-memory multiprocessor extensions (planned for inclusion in release 3.0 of the tools) available to tutorial participants, when they become available.

    Participation in the tutorial will be limited to the first forty registrants on a first-come, first-serve basis. To register, please fill out this registration form. If you have any questions, please send e-mail to the tutorial organizers, Todd Austin and Doug Burger. We hope to see you there!

    Last modified by Doug Burger on 10/27/97.