Computer Science Department
University of California, Davis
As a computer architect, I broadly want to enable the continuing exponential growth in computing capability despite the slowing of Moore’s Law. My research interests are heterogeneous systems, memory systems, and hardware-software interaction.
Online book aimed to familiarize new users with the gem5 architectural simulator. This is a current work-in-progress, so check back often for updates.
Cisco Systems Distinguished Graduate Fellowship2014–2015 & 2015–2016
Summer Research Assistant AwardSummer 2011
Proposal title: Exploring Cache Coherence on GPGPUs
Lecturer: CS 354 (Machine Organization and Programming)Fall 2015
Lectured to class of 141 three times weekly. Prepared teaching material, tests, and assignments. Course website
Guest Lectures: CS 752 (Advanced Computer Architecture I) DRAM, Memory Systems, and VirtualizationSpring 2015
Presented a class on main memory including a discussion of DRAM architecture and memory system policies.
Presented a class on virtual memory including a discussion of paging, translation, TLBs, and virtual memory system performance.
Presented a class on virtual machine support including a discussion of nested paging and current research proposals for reducing virtual memory overheads.
Guest Lectures: CS 757 (Advanced Computer Architecture II) GPU Architectures and Memory SystemsSpring 2014
Presented a class on GPU architecture including data parallelism, GPU execution models, GPU programming models, and modern GPU architecture.
Presented a class on GPU memory systems including a discussion of modern memory system design and recent research proposals including QuickRelease, Heterogeneous Race Free memory model, Heterogeneous System Coherence, and Supporting Address Translation for 1000's of GPU Lanes.
Math Teaching Assistant in Georgia Tech Math DepartmentFall 2007
Taught Honors Calculus I to class of 32 twice weekly and assisted students one-on-one.
Intern at Advanced Micro Devices (AMD) ResearchSpring 2012
Explored new cache coherence architectures to support future heterogeneous CPU-GPU processors. The publication Heterogeneous System Coherence for Integrated CPU-GPU Systems (HSC) is a result of this work.
Applied for patent "Serving memory requests in cache coherent heterogeneous systems" that describes an optmization to HSC for producer-consumer sharing on heterogeneous systems.
Co-op at Georgia Tech Research Institute (GTRI)2008–2009
Built large Windows software application as part of a team to monitor subsystems in modern fighter jets and developed software for embedded machines running VxWorks which controlled electronic warfare systems.
Acquired Secret Security Clearance
Volunteer and Outreach
Scratch Club for 5th GradersFall 2014
Taught an after school class of 16 5th graders the basics of computer science as part of a team. Helped develop lesson plans and taught the whole class and students one-on-one.
40 Years of Computer ArchitectureFall 2014
Created a poster which details professors, graduates, and their awards throughout the history of the computer architecture program at UW-Madison.
Master of Science in Computer ScienceUniversity of Wisconsin-Madison Summer 2013
Bachelor of Science in Computer ScienceGeorgia Institute of Technology Summa cum laude Spring 2010
Computer Sciences Building
1210 W Dayton St.
Madison, WI 53706