Eric Schnarr (schnarr@cs.wisc.edu)

I am a Ph.D. graduate of the University of Wisconsin-Madison, now working for Accuray, Inc. My research focused on applying programming language technology to improve micro-architecture simulation. My accomplishments include a simulator for out-of-order processors that is 10x faster than contemporary simulators, and a language and compiler for generating similarly optimized architecture simulators. Recently, for Accuray, I have been developing software to plan radiation treatments on TomoTherapy hardware.

Ph.D. Research

• Fast Micro-Architecture Simulation -- FastSim
• Architecture Description Languages -- SADL & Facile

Honors

• Intel Foundation Graduate Fellowship, 1998 - 1999.

Education

• University of Wisconsin-Madison, 1992 - 2000. Received a Ph.D. in Computer Sciences in December 2000.
• Mellon College of Science at Carnegie-Mellon University, 1986 - 1990. Received the degree of Bachelor of Science in Applied Mathematics/Computer Science in May 1990. Graduated with University Honors and a grade point average of 3.93 out of 4.00.

Professional Experience

• Senior Software Engineer at TomoTherapy, Inc., Madison, WI, 2002-present. A lead software architect and developer working in TomoTherapy's research group. My contributions include developing distributed applications and management tools for a high performance cluster of workstations that is distributed with the product. As a young company, TomoTherapy has recently become ISO 9000 compliant. I have authored requirements and design documents under this process, in addition to coding and unit testing.
• Software Engineer at QUIQ Inc., Madison, WI, Jan-Sept 2001. Worked alongside other engineers to develop features in two releases of QUIQ's customer support software. Developed a tool to automatically generate documentation of the product's many configuration options via source code analysis. And was a lead designer of a special purpose language for expressing the layout of dynamically generated web pages, to be used in future versions of the QUIQ product.
• Software Engineer at Hypercosm Inc., Middleton, WI, 2000 - 2001. Designed and began implementation of OMAR2, a new programming language intended to replace Hypercosm's existing Object Modeling, Animation and Rendering language. Primary designer of the language and primary developer implementing the OMAR2 compiler. Also responsible for architecting and providing theoretical expertise in the design and implementation of a new bytecode interpreter for compiled OMAR2 programs.
• RA, University of Wisconsin-Madison, Computer Sciences Department, 1993 - 2000. Working with Prof. James Larus on the WWT project and later on my thesis project, FastSim. On the WWT project I helped develop Blizzard-S for CM-5 and COW, and EEL (the Executable Editing Library) for various architectures.
• AT&T Bell Laboratories, Middletown, NJ, 1990 - 1992 and Summer 1993. Designed a new process for NSD using object oriented design. Implemented a front-end for entering control data into the NSD system. Implemented and maintained the physical data model for NCD on a Teradata DBC/1012 data base computer. Designed and implemented tools to support the project and physical data team needs.
• IBM Complementary Products Engineering Laboratory, Summer 1990. Designed, and implemented an expert system to collate service records for statistical evaluation of hardware failures.
• Carnegie-Mellon University, Computer Science Department, Sept. 1989 - May 1990. Worked with Prof. Peter Lee to design and program a compiler for the functional language Haskell.
• IBM System Integration Division, Summer 1989. Contract programmer writing inventory management systems.
• IBM Complementary Products Engineering Laboratory, Summers 1987 & 1988. Designed and programmed a product maintenance tracking system.
• Carnegie-Mellon Computer Science Department, 1988 - 1989. Grader for data structures and computer language courses.
• AT&T Information Systems Laboratory, Summer 1986. Computer lab administrator for the application certification lab.
• Other, 1984 - 1986. Assisted teaching in community Adult School computer courses; computer technician, teaching basic math and reading skills to children. Designed and programmed a cooperative computer game for Global Learning, Inc.

Publications

• Eric Schnarr, Mark Hill, and James Larus, "Facile: A Language and Compiler For High-Performance Processor Simulators," in the ACM SIGPLAN 2001 Conference on Programming Language Design and Implementation (PLDI01), Snowbird, Utah, June 20-22, 2001.
• Eric Schnarr, Applying Programming Language Implementation Techniques To Processor Simulation, Ph.D. Dissertation, University of Wisconsin-Madison, Computer Sciences Department, Fall 2000.
• Eric Schnarr and James Larus, "Fast Out-Of-Order Processor Simulation Using Memoization," in the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VIII), San Jose, California, October 4-7, 1998.
• Eric Schnarr and James Larus, "Instruction Scheduling and Executable Editing," in the IEEE/ACM International Symposium on Microarchitecture (MICRO-29), Paris, France, December 2-4, 1996.
• Eric Schnarr and James Larus, "Instruction Scheduling and Executable Editing," in the ACM SIGPLAN SIGOPS Workshop on Compiler Support for System Software (WCSSS'96), Tucson, Arizona, February 1996.
• James Larus and Eric Schnarr, "EEL: Machine-Independent Executable Editing," in the SIGPLAN Conference on Programming Language Design and Implementation (PLDI), June 1995.

Talks

• "Facile: A Language and Compiler For High-Performance Processor Simulators," ACM SIGPLAN 2001 Conference on Programming Language Design and Implementation (PLDI01), Snowbird, Utah, June 20-22, 2001.
• "Fast Out-Of-Order Processor Simulation Using Memoization," Invited talk for the Management Information Systems class at Montclair State University, School of Business, Upper Montclair, NJ, January 1999.
• "Fast Out-Of-Order Processor Simulation Using Memoization," Eighth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VIII), San Jose, California, October 4-7, 1998.
• "Accelerating Microarchitecture Simulation Using Memoization," Industrial Affiliates Program Annual Seminar, University of Wisconsin-Madison, Computer Sciences Department, October 1997. (Based on work by Eric Schnarr and James Larus on the FastSim out-of-order processor simulator.)
• "Instruction Scheduling and Executable Editing," ACM SIGPLAN SIGOPS Workshop on Compiler Support for System Software (WCSSS'96), Tucson, Arizona, February 1996.
• "A Type-Theoretic Approach to Higher-Order Modules with Sharing," Programming Languages Seminar, University of Wisconsin-Madison, Computer Sciences Department, October 1994. (Based on: Robert Harper and Mark Lillibridge, "A Type-Theoretic Approach to Higher-Order Modules with Sharing," in the Proceedings of the Twenty-first Annual ACM Symposium on Principles of Programming Languages (PLDI), Portland. ACM, January 1994.)
• Informal workshop: "Spawn: Generating Machine Specific Code from Architecture Descriptions," ACM SIGPLAN Conference on Programming Language Design and Implementation, June 1994.