Assignment 7

CS/ECE 354-2, Fall 1998

Homework will NOT be turned in.

Homework

  1. It takes a (pretend) disk 4 milliseconds to seek to a desired track. A sector can be read in 2 microseconds, and the disk spins at a rate of 400 revolutions per minute. How long (worst case) does it take to read a sector on this disk?
  2. When running a program to benchmark a computer system, 4,000,000 instructions are executed, generating a total of 5,000,000 memory accesses. The system being benchmarked has a cache. Of all the memory accesses, 94% hit in the cache. If the system has a 2 nsec cache access time, and the memory has a 22 nsec access time, what is the average memory access time for this program?
  3. If a direct mapped cache has 1K lines, and 8 32-bit words per block. How many bytes of data does this cache hold? How many bits of the address must be used to determine the line number? For a byte addressable machine, how many bits of address must be used to determine the byte within a block?
  4. Draw a timing diagram of a pipelined execution of the Pentium instructions
    
    mov  ebx, 0
    mov  eax, [ebp]
    add  ebx, eax
    
    
    Use the 5-stage pipeline given in Chapter 15 of the book. Use figure 15.3 or 15.4 as a model for the diagram.
  5. A program is executed to see how long it takes to run. It takes 40 seconds. The program is then improved, so that it only takes 30 seconds to execute the program, what speedup has been achieved? If the code within the program that was enhanced accounted for 80% of the original execution time of the program, what speedup was attained on this enhanced portion of code?