Emulating Unimplemented Instructions in a Simultaneous Multithreaded Processor

Suan Yong and Brian Forney
CS/ECE 752
Spring 2000
Abstract
Emulating unimplemented instructions can reduce the cost and power requirements of a processor by allowing functional units to be removed. But the handling of unimplemented instruction exceptions in modern processors wastes fetch bandwidth and reduces throughput due to squashed instructions. Simultaneous Multithreaded (SMT) processors can avoid the waste by using multiple thread contexts to handle unimplemented instruction exceptions. We investigate the effectiveness of SMT in improving the performance of emulating unimplemented instructions. We focus on emulation of the Alpha 21164's integer multiply instructions as a proof of concept.