SWETHA
KRISHNAN
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7361, Department of Computer
Sciences
Work Phone : (608)-262-2252
1210 W Dayton St
Cellphone : (608)-346-3669
Madison, WI 53706
E-mail :
swetha@cs.wisc.edu
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Objective
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A
professional full-time opportunity in Operating Systems/Networking
or related domains of Computer Sciences.
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Education
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Masters in Computer
Sciences
University of
Wisconsin-Madison.
Current GPA : 3.875/4.00
B.E. (Hons.), Computer
Science.
Birla Institute of
Technology and Science (BITS), Pilani, India.
Overall
CGPA : 9.81/10.00
Rank In Computer
Science Department: 3rd out of 150 students.
D.B.M.S English
School, Jamshedpur, India.
Overall
Percentage : 95.25%
D.B.M.S English
School, Jamshedpur.
Overall
Percentage : 92%
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Expected:
May 2007
Completed:
June 2005
Completed:
June 2001
Completed:
June 1999
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Relevant
Courses
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Academic
Awards and Achievements
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Was selected for and
participated in the Google Workshop for Women Engineers 2006,
being one among about 190
students chosen from universities across the United States.
Was honored with the All
India Talent SCHOLARSHIP (A.I.T.S) AWARD, 1993 conferred by
the International Children’s Excellence Fund (INCEF), a child
body of UNICEF. Received the award from the Honorable
Prime Minister of India, Shri H.D. Deve Gowda, at a special
function at the capital.
Recipient of the BITS
Merit Scholarship (awarded to the top 10 students of the
entire undergraduate batch of about 900 students) for 5 semesters
at BITS, Pilani.
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Publication
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T S B
Sudarshan, Pavankiran, Swetha Krishnan and G Raghurama, "Fuzzy
Logic Approach for Replacement Policy in Web Caching",
Proceedings of 2nd IEEE Indian International Conference on
Artificial Intelligence, Pune, India, Dec 2005.
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Technological
Skills
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Programming Languages: C,
Java, C++, Visual Basic 6.0, UNIX Network Programming, UNIX Shell
Programming, SQL, Oracle PL/SQL, Assembly Language Programming on
the 8086/80X86 processors.
Platforms : Linux,
Windows 9x/NT/2000/XP, Microsoft Compact .NET Framework.
Packages Used :
ORACLE-9I, Network Simulator NS-2, Simplescalar, MATLAB, Veriwell
Simulator, OpenNetCF Smart Device Framework.
Microprocessor
: 8086 Architecture and Assembly, MIPS.
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Professional
Experience
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Summer internship at
Amazon Inc., Seattle, USA from 22nd May to 25th
August, 2006.
1-semester Internship
(Co-op), at Hewlett-Packard Labs, Bangalore, India
from 6th January 2005 to 17th June 2005.
Summer internship at
the Bhabha Atomic Research Center, Mumbai, India from 21st
May 2003 to 14th July 2003.
Research Assistant
with the ADSL (ADvanced Systems Laboratory) group at the
University of Wisconsin-Madison during Fall 2006 (current).
Teaching Assistant
for the course CS 310 Problem Solving using Computers
during Fall 2005 and Spring
2006 at the University of Wisconsin-Madison.
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Projects
Summary
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Factorization of Device
Driver Code between Kernel and User spaces (Jan-May 2006)
This
was done as the course project for my graduate Operating Systems
course. We proposed a new scheme for device driver
implementation that gains on robustness of the system without
sacrificing driver performance. Currently, drivers are
implemented as kernel code, which poses stability problems since
bugs in the drivers cause kernel crashes. Our approach was to
“factorize” the driver – retain the performance critical
code in the kernel and move the less performance sensitive code
to the user space. In our split driver, work that needs to be
done fast such as device I/O and interrupt handling is retained
in the kernel space. Work that is less frequent and can afford to
be done slower such as driver configuration or statistics
collection is moved to the user space. Thus we reduce the
likelihood of driver bugs affecting the kernel. We implemented
this scheme on PCnet32 network driver for Linux.
Binary-Encoded
Attribute Pairing for Database Compression (Jan – May 2006)
This
work was done as a Database Systems course project. We introduced
and evaluated a
new
compression scheme for relational databases for optimizing
storage space. The scheme uses bitwise encoding based on distinct
attribute values to represent the data in the columns
(attributes) of our database. The scheme further encodes the
resulting columns 'in pairs' at each stage of our compression.
We also explored various ways to pair columns by exploiting
properties that exist for the relation, such as primary key,
number of distinct values of an attribute, and functional
dependencies. Our results indicate that even without prior
knowledge , of the data distribution, the compression achieved is
superior to that of standard compression utilities such as Gzip
and Zip.
Event
Tracker : A service that monitors timely occurrence of events
(May–Aug 2006)
I
worked on this project during my summer internship with
Amazon.com. I developed a tool to provide
monitoring of events based on their scheduled times and estimated
durations. An event is a process whose execution or failure to
execute in a timely manner should be associated with a resulting
action such as an alarm (say an e-mail or a page using the
company's alarming system). The
Event Tracker service stores information about registered events
and automatically tracks their expected completion time. If
events occur before or after anticipated times beyond stated
thresholds, the Event Tracker would trigger various alarms as
configured for the event type. This tool also provides a
centralized means of querying for event information to be
displayed on dashboards with useful statistics. With this tool,
processes can be monitored even if the host goes down or the cron
job meant to start the process fails.
Simulation of an RFID
Platform on Network Simulator NS-2 (Aug
– Dec 2005)
This was done as the course
project for my Advanced Computer Networks Course (CS 740) at UW,
Madison. We did a study of Radio Frequency Identification(RFID)
Systems and various challenging problems in this domain like
Redundant Reader Elimination , RFID Privacy and Load Balancing.
We found the lack of a robust, publicly available simulator for
the RFID platform for working on these problems. So we developed
an RFID System emulation using the wireless extensions of NS-2
as a base and revamping it to work according to the RFID Protocol
Standards as specified by EPC Global. We also tested the
robustness of our platform by implementing a Load Balancing
Scheme for distributing load on RFID Readers to optimize power
consumption.
Implementation of
Virtual Load Store Queues on Sim-Alpha (Aug-
Dec 2005)
This project was a part of
my Advanced Computer Architecture Course. We worked on a
'debunking' attempt, on a paper 'Using Virtual Load/Store Queues
(VLSQs) to Reduce the Negative Effects of Reordered Memory
Instructions' and investigated our suspicion of the unbalanced
baseline processor configuration chosen by the authors. The paper
proposes VLSQ – a virtual window within the physical load/store
queue- as a method to overcome the wastage of energy caused by
aggressive out-of-order execution. We implemented the VLSQ scheme
on sim-alpha architecture simulator and tested it on the given as
well as on more balanced processor configurations. The results of
our simulations showed that while the overall conclusion arrived
at in the paper still holds true, the numbers are slightly less
optimistic than projected, compared to those with a more balanced
baseline.
Digital Multimedia
Broadcasting – Printcast (Jan
– June 2005)
This project was a part of
my Co-op work at HP Labs, India. It was based on a system called
“Printcast” through which
print content that is closely associated with the audio-video of
the television program can be simulcasted over the broadcast
channel and received and printed by TV viewers. My work involved
developing methods with which non-print content such as
ring-tones, URLs and feedback forms can be sent along with the
A/V TV signal , rather than print content. The non-print data is
received by the Printcast Decoder and transmitted wirelessly,
using the Bluetooth protocol , to hand-held devices such as
Pocket PCs and mobile phones.
Application of Soft
Computing Techniques to Cache Replacement Algorithms for Caching
on the World Wide Web. (Jan - April 2004)
I took up this project on
web caching in the second semester of my third year. It aimed at
devising a novel method for cache replacement for Proxy Caching
using Fuzzy Logic, and assessing its suitability with respect to
traditional methods. The
performance analysis gave an insight into inferences about the
conditions under which the Fuzzy Method supersedes the existing
conventional replacement techniques like LFU, LRU and SLRU.
Additionally, I also did a study of Genetic Algorithm based
techniques for cache replacement. I also co-authored a
research paper on this work, which was accepted at IICAI 2005
Conference.
Multi-Resolution Image
Analysis and Compression Using Wavelets (May –July
2003)
This
project was undertaken during my Practice School I (summer
internship) at Bhabha Atomic Research Center (BARC), Mumbai. It
involved a study of Wavelets and their application to
Multi-Resolution Analysis (MRA) and Image Compression. The
project involved 2 modules-a) implementation of an efficient
algorithm for construction of “Image Pyramids” and
b)performing Image Compression (as well as original image
reconstruction) by applying the “Discrete Wavelet
Transformation”, and using the earlier module. We
also experimented with different kinds of thresholding and
quantization, including a self-devised fan-in strategy, applied
to the image after its decomposition into ‘tiles’ by MRA. We
also performed texture analysis by applying wavelet techniques to
texture images .
Survivable Networks :
Active and Backup Path Computation
(Aug – Dec 2004)
This
project dealt with the important issue of restoration in
networks, specifically, the provision of survivable multicast
sessions. It investigated methods to compute active and backup
paths to overcome single-link and single-node failures in Mesh
Networks, with maximum sharing of backup paths to minimize
bandwidth reservation on each link. We
adopted a segment-disjoint restoration path computation
approach, in favor of link-disjoint
or arc disjoint algorithms to achieve minimum reserved bandwidth.
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