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HMCController Member List

This is the complete list of members for HMCController, including all inherited members.

_currPwrStateClockedObjectprotected
_paramsSimObjectprotected
BaseXBar(const BaseXBarParams *p)BaseXBarprotected
calcPacketTiming(PacketPtr pkt, Tick header_delay)BaseXBarprotected
checkPortCache(Addr addr) const BaseXBarinlineprotected
ckptCountSerializablestatic
ckptMaxCountSerializablestatic
ckptPrevCountSerializablestatic
clearPortCache()BaseXBarinlineprotected
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) const Clockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() const Clockedinline
computeStats()ClockedObject
curCycle() const Clockedinline
currentSection()Serializablestatic
cyclesToTicks(Cycles c) const Clockedinline
defaultPortIDBaseXBarprotected
defaultRangeBaseXBarprotected
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() const Drainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() const EventManagerinline
find(const char *name)SimObjectstatic
findPort(Addr addr)BaseXBarprotected
forwardLatencyBaseXBarprotected
frequency() const Clockedinline
frontendLatencyBaseXBarprotected
getAddrRanges() const BaseXBarprotected
getMasterPort(const std::string &if_name, PortID idx=InvalidPortID)BaseXBarvirtual
getProbeManager()SimObject
getSlavePort(const std::string &if_name, PortID idx=InvalidPortID)BaseXBarvirtual
gotAddrRangesBaseXBarprotected
gotAllAddrRangesBaseXBarprotected
HMCController(const HMCControllerParams *p)HMCController
init()BaseXBarvirtual
initState()SimObjectvirtual
loadState(CheckpointIn &cp)SimObjectvirtual
masterPortsBaseXBarprotected
memInvalidate()SimObjectinlinevirtual
MemObject(const Params *params)MemObject
memWriteback()SimObjectinlinevirtual
n_master_portsHMCControllerprivate
name() const SimObjectinlinevirtual
nextCycle() const Clockedinline
NoncoherentXBar(const NoncoherentXBarParams *p)NoncoherentXBar
notifyFork()Drainableinlinevirtual
numPwrStateTransitionsClockedObjectprotected
operator=(Clocked &)=deleteClockedprotected
Params typedefMemObject
params() const MemObjectinline
pktCountBaseXBarprotected
pktSizeBaseXBarprotected
portCacheBaseXBarprotected
portMapBaseXBarprotected
prvEvalTickClockedObjectprotected
pwrState() const ClockedObjectinline
pwrState(Enums::PwrState)ClockedObject
pwrStateClkGateDistClockedObjectprotected
pwrStateName() const ClockedObjectinline
pwrStateResidencyTicksClockedObjectprotected
pwrStateWeights() const ClockedObject
recvAtomic(PacketPtr pkt, PortID slave_port_id)NoncoherentXBarprotected
recvFunctional(PacketPtr pkt, PortID slave_port_id)NoncoherentXBarprotected
recvRangeChange(PortID master_port_id)HMCControllerprivatevirtual
recvReqRetry(PortID master_port_id)NoncoherentXBarprotected
recvTimingReq(PacketPtr pkt, PortID slave_port_id)HMCControllerprivatevirtual
recvTimingResp(PacketPtr pkt, PortID master_port_id)NoncoherentXBarprotectedvirtual
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats()NoncoherentXBarvirtual
reqLayersNoncoherentXBarprotected
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() const Clockedinlineprotected
resetStats()SimObjectvirtual
respLayersNoncoherentXBarprotected
responseLatencyBaseXBarprotected
rotate_counter()HMCControllerprivate
routeToBaseXBarprotected
rr_counterHMCControllerprivate
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideClockedObjectvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) const Serializable
serializeSection(CheckpointOut &cp, const std::string &name) const Serializableinline
setCurTick(Tick newVal)EventManagerinline
signalDrainDone() const Drainableinlineprotected
SimObject(const Params *_params)SimObject
slavePortsBaseXBarprotected
startup()SimObjectvirtual
ticksToCycles(Tick t) const Clockedinline
totPktSizeNoncoherentXBar
transDistBaseXBarprotected
unserialize(CheckpointIn &cp) overrideClockedObjectvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
updateClockPeriod() const Clockedinline
updatePortCache(short id, const AddrRange &range)BaseXBarinlineprotected
useDefaultRangeBaseXBarprotected
voltage() const Clockedinline
wakeupEventQueue(Tick when=(Tick)-1)EventManagerinline
widthBaseXBarprotected
xbarRangesBaseXBarprotected
~BaseXBar()BaseXBarvirtual
~Clocked()Clockedinlineprotectedvirtual
~Drainable()Drainableprotectedvirtual
~NoncoherentXBar()NoncoherentXBarvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

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