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ThreadContext Class Referenceabstract

ThreadContext is the external interface to all thread state for anything outside of the CPU. More...

#include <thread_context.hh>

Inheritance diagram for ThreadContext:
CheckerThreadContext< TC > O3ThreadContext< class > ProxyThreadContext< TC > ProxyThreadContext< SimpleThread >

Public Types

enum  Status { Active, Suspended, Halted }
 

Public Member Functions

virtual ~ThreadContext ()
 
virtual BaseCPUgetCpuPtr ()=0
 
virtual int cpuId () const =0
 
virtual uint32_t socketId () const =0
 
virtual int threadId () const =0
 
virtual void setThreadId (int id)=0
 
virtual int contextId () const =0
 
virtual void setContextId (int id)=0
 
virtual TheISA::TLB * getITBPtr ()=0
 
virtual TheISA::TLB * getDTBPtr ()=0
 
virtual CheckerCPUgetCheckerCpuPtr ()=0
 
virtual TheISA::Decoder * getDecoderPtr ()=0
 
virtual SystemgetSystemPtr ()=0
 
virtual
TheISA::Kernel::Statistics * 
getKernelStats ()=0
 
virtual PortProxygetPhysProxy ()=0
 
virtual FSTranslatingPortProxygetVirtProxy ()=0
 
virtual void initMemProxies (ThreadContext *tc)=0
 Initialise the physical and virtual port proxies and tie them to the data port of the CPU. More...
 
virtual SETranslatingPortProxygetMemProxy ()=0
 
virtual ProcessgetProcessPtr ()=0
 
virtual void setProcessPtr (Process *p)=0
 
virtual Status status () const =0
 
virtual void setStatus (Status new_status)=0
 
virtual void activate ()=0
 Set the status to Active. More...
 
virtual void suspend ()=0
 Set the status to Suspended. More...
 
virtual void halt ()=0
 Set the status to Halted. More...
 
void quiesce ()
 Quiesce thread context. More...
 
void quiesceTick (Tick resume)
 Quiesce, suspend, and schedule activate at resume. More...
 
virtual void dumpFuncProfile ()=0
 
virtual void takeOverFrom (ThreadContext *old_context)=0
 
virtual void regStats (const std::string &name)=0
 
virtual EndQuiesceEventgetQuiesceEvent ()=0
 
virtual Tick readLastActivate ()=0
 
virtual Tick readLastSuspend ()=0
 
virtual void profileClear ()=0
 
virtual void profileSample ()=0
 
virtual void copyArchRegs (ThreadContext *tc)=0
 
virtual void clearArchRegs ()=0
 
virtual uint64_t readIntReg (int reg_idx)=0
 
virtual FloatReg readFloatReg (int reg_idx)=0
 
virtual FloatRegBits readFloatRegBits (int reg_idx)=0
 
virtual CCReg readCCReg (int reg_idx)=0
 
virtual void setIntReg (int reg_idx, uint64_t val)=0
 
virtual void setFloatReg (int reg_idx, FloatReg val)=0
 
virtual void setFloatRegBits (int reg_idx, FloatRegBits val)=0
 
virtual void setCCReg (int reg_idx, CCReg val)=0
 
virtual TheISA::PCState pcState ()=0
 
virtual void pcState (const TheISA::PCState &val)=0
 
void setNPC (Addr val)
 
virtual void pcStateNoRecord (const TheISA::PCState &val)=0
 
virtual Addr instAddr ()=0
 
virtual Addr nextInstAddr ()=0
 
virtual MicroPC microPC ()=0
 
virtual MiscReg readMiscRegNoEffect (int misc_reg) const =0
 
virtual MiscReg readMiscReg (int misc_reg)=0
 
virtual void setMiscRegNoEffect (int misc_reg, const MiscReg &val)=0
 
virtual void setMiscReg (int misc_reg, const MiscReg &val)=0
 
virtual int flattenIntIndex (int reg)=0
 
virtual int flattenFloatIndex (int reg)=0
 
virtual int flattenCCIndex (int reg)=0
 
virtual int flattenMiscIndex (int reg)=0
 
virtual uint64_t readRegOtherThread (int misc_reg, ThreadID tid)
 
virtual void setRegOtherThread (int misc_reg, const MiscReg &val, ThreadID tid)
 
virtual unsigned readStCondFailures ()=0
 
virtual void setStCondFailures (unsigned sc_failures)=0
 
virtual Counter readFuncExeInst ()=0
 
virtual void syscall (int64_t callnum, Fault *fault)=0
 
virtual int exit ()
 
virtual uint64_t readIntRegFlat (int idx)=0
 Flat register interfaces. More...
 
virtual void setIntRegFlat (int idx, uint64_t val)=0
 
virtual FloatReg readFloatRegFlat (int idx)=0
 
virtual void setFloatRegFlat (int idx, FloatReg val)=0
 
virtual FloatRegBits readFloatRegBitsFlat (int idx)=0
 
virtual void setFloatRegBitsFlat (int idx, FloatRegBits val)=0
 
virtual CCReg readCCRegFlat (int idx)=0
 
virtual void setCCRegFlat (int idx, CCReg val)=0
 

Static Public Member Functions

static void compare (ThreadContext *one, ThreadContext *two)
 function to compare two thread contexts (for debugging) More...
 

Protected Types

typedef TheISA::MachInst MachInst
 
typedef TheISA::IntReg IntReg
 
typedef TheISA::FloatReg FloatReg
 
typedef TheISA::FloatRegBits FloatRegBits
 
typedef TheISA::CCReg CCReg
 
typedef TheISA::MiscReg MiscReg
 

Detailed Description

ThreadContext is the external interface to all thread state for anything outside of the CPU.

It provides all accessor methods to state that might be needed by external objects, ranging from register values to things such as kernel stats. It is an abstract base class; the CPU can create its own ThreadContext by either deriving from it, or using the templated ProxyThreadContext.

The ThreadContext is slightly different than the ExecContext. The ThreadContext provides access to an individual thread's state; an ExecContext provides ISA access to the CPU (meaning it is implicitly multithreaded on SMT systems). Additionally the ThreadState is an abstract class that exactly defines the interface; the ExecContext is a more implicit interface that must be implemented so that the ISA can access whatever state it needs.

Definition at line 93 of file thread_context.hh.

Member Typedef Documentation

typedef TheISA::CCReg ThreadContext::CCReg
protected

Definition at line 100 of file thread_context.hh.

typedef TheISA::FloatReg ThreadContext::FloatReg
protected

Definition at line 98 of file thread_context.hh.

typedef TheISA::FloatRegBits ThreadContext::FloatRegBits
protected

Definition at line 99 of file thread_context.hh.

typedef TheISA::IntReg ThreadContext::IntReg
protected

Definition at line 97 of file thread_context.hh.

typedef TheISA::MachInst ThreadContext::MachInst
protected

Definition at line 96 of file thread_context.hh.

typedef TheISA::MiscReg ThreadContext::MiscReg
protected

Definition at line 101 of file thread_context.hh.

Member Enumeration Documentation

Enumerator
Active 

Running.

Instructions should be executed only when the context is in this state.

Suspended 

Temporarily inactive.

Entered while waiting for synchronization, etc.

Halted 

Permanently shut down.

Entered when target executes m5exit pseudo-instruction. When all contexts enter this state, the simulation will terminate.

Definition at line 104 of file thread_context.hh.

Constructor & Destructor Documentation

virtual ThreadContext::~ThreadContext ( )
inlinevirtual

Definition at line 120 of file thread_context.hh.

Member Function Documentation

virtual void ThreadContext::activate ( )
pure virtual
virtual void ThreadContext::clearArchRegs ( )
pure virtual
void ThreadContext::compare ( ThreadContext one,
ThreadContext two 
)
static
virtual int ThreadContext::contextId ( ) const
pure virtual
virtual void ThreadContext::copyArchRegs ( ThreadContext tc)
pure virtual
virtual int ThreadContext::cpuId ( ) const
pure virtual
virtual void ThreadContext::dumpFuncProfile ( )
pure virtual
virtual int ThreadContext::exit ( )
inlinevirtual

Definition at line 282 of file thread_context.hh.

virtual int ThreadContext::flattenCCIndex ( int  reg)
pure virtual
virtual int ThreadContext::flattenFloatIndex ( int  reg)
pure virtual
virtual int ThreadContext::flattenIntIndex ( int  reg)
pure virtual
virtual int ThreadContext::flattenMiscIndex ( int  reg)
pure virtual
virtual CheckerCPU* ThreadContext::getCheckerCpuPtr ( )
pure virtual
virtual BaseCPU* ThreadContext::getCpuPtr ( )
pure virtual

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.

Referenced by AbstractMemory::checkLockedAddrList(), SparcISA::ISA::checkSoftInt(), KvmVM::contextIdToVCpuId(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), PseudoInst::dumpresetstats(), PseudoInst::dumpstats(), ArmISA::TableWalker::fetchDescriptor(), ArmISA::Stage2MMU::Stage2Translation::finish(), BaseRemoteGDB::getComInstEventQueue(), X86ISA::initCPU(), PseudoInst::initParam(), ArmISA::Reset::invoke(), ArmISA::AbortFault< T >::invoke(), ArmISA::SystemError::invoke(), ArmISA::ArmSev::invoke(), PseudoInst::loadsymbol(), PseudoInst::m5checkpoint(), Linux::openSpecialFile(), EndQuiesceEvent::process(), Linux::DmesgDumpEvent::process(), Linux::KernelPanicEvent::process(), DumpStatsPCEvent::process(), BreakPCEvent::process(), PanicPCEvent::process(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), quiesce(), PseudoInst::quiesceCycles(), PseudoInst::quiesceSkip(), quiesceTick(), AlphaISA::ISA::readIpr(), X86ISA::ISA::readMiscReg(), RiscvISA::ISA::readMiscReg(), ArmISA::ISA::readMiscReg(), SparcISA::ISA::readMiscReg(), PseudoInst::resetstats(), SparcISA::ISA::serialize(), LinuxAlphaSystem::setDelayLoop(), SparcISA::ISA::setFSReg(), X86ISA::ISA::setMiscReg(), MipsISA::ISA::setMiscReg(), SparcISA::ISA::setMiscReg(), LinuxArmSystem::startup(), takeOverFrom(), PseudoInst::workbegin(), and PseudoInst::workend().

virtual TheISA::Decoder* ThreadContext::getDecoderPtr ( )
pure virtual
virtual TheISA::TLB* ThreadContext::getDTBPtr ( )
pure virtual
virtual TheISA::TLB* ThreadContext::getITBPtr ( )
pure virtual
virtual TheISA::Kernel::Statistics* ThreadContext::getKernelStats ( )
pure virtual
virtual SETranslatingPortProxy& ThreadContext::getMemProxy ( )
pure virtual
virtual PortProxy& ThreadContext::getPhysProxy ( )
pure virtual
virtual Process* ThreadContext::getProcessPtr ( )
pure virtual
virtual EndQuiesceEvent* ThreadContext::getQuiesceEvent ( )
pure virtual
virtual System* ThreadContext::getSystemPtr ( )
pure virtual
virtual FSTranslatingPortProxy& ThreadContext::getVirtProxy ( )
pure virtual
virtual void ThreadContext::halt ( )
pure virtual
virtual void ThreadContext::initMemProxies ( ThreadContext tc)
pure virtual

Initialise the physical and virtual port proxies and tie them to the data port of the CPU.

tc ThreadContext for the virtual-to-physical translation

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by BaseKvmCPU::init(), and MinorCPU::init().

virtual Addr ThreadContext::instAddr ( )
pure virtual
virtual MicroPC ThreadContext::microPC ( )
pure virtual
virtual Addr ThreadContext::nextInstAddr ( )
pure virtual
virtual TheISA::PCState ThreadContext::pcState ( )
pure virtual

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by AlphaProcess::argsInit(), MipsProcess::argsInit(), PowerProcess::argsInit(), RiscvProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), Trace::SparcNativeTrace::check(), AlphaISA::Interrupts::checkInterrupts(), cloneFunc(), BaseRemoteGDB::cmd_async_cont(), BaseRemoteGDB::cmd_async_step(), BaseRemoteGDB::cmd_cont(), BaseRemoteGDB::cmd_step(), Minor::Execute::commit(), compare(), PowerISA::copyRegs(), AlphaISA::copyRegs(), RiscvISA::copyRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), X86ISA::copyRegs(), MipsISA::copyRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), Minor::Execute::executeMemRefInst(), execveFunc(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), SparcProcess::handleTrap(), AlphaISA::initCPU(), X86ISA::initCPU(), X86System::initState(), FullO3CPU< Impl >::insertThread(), FaultBase::invoke(), AlphaISA::AlphaFault::invoke(), SparcISA::SparcFaultBase::invoke(), ReExec::invoke(), SyscallRetryFault::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::PowerOnReset::invoke(), RiscvISA::RiscvFault::invoke(), MipsISA::MipsFaultBase::invoke(), X86ISA::X86Trap::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), SparcISA::SpillNNormal::invoke(), ArmISA::Reset::invoke(), MipsISA::TlbFault< TlbInvalidFault >::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), ArmISA::SupervisorCall::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::FlushPipe::invoke(), ArmISA::ArmFault::invoke64(), RiscvISA::RiscvFault::invoke_se(), RiscvISA::UnknownInstFault::invoke_se(), RiscvISA::UnimplementedFault::invoke_se(), RiscvISA::IllegalFrmFault::invoke_se(), ioctlFunc(), mmapImpl(), SkipFuncEvent::process(), PseudoInst::pseudoInst(), ArmISA::ISA::readMiscReg(), serialize(), MipsISA::MipsFaultBase::setExceptionState(), ArmISA::ISA::setMiscReg(), setNPC(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), AlphaISA::skipFunction(), ArmISA::skipFunction(), SparcISA::skipFunction(), MipsISA::skipFunction(), X86ISA::I386Process::syscall(), AlphaISA::StackTrace::trace(), BaseRemoteGDB::trap(), Minor::Execute::tryPCEvents(), Minor::Execute::tryToBranch(), unserialize(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), ArmKvmCPU::updateTCStateCore(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContextRegs(), and Minor::Fetch1::wakeupFetch().

virtual void ThreadContext::pcState ( const TheISA::PCState &  val)
pure virtual
virtual void ThreadContext::pcStateNoRecord ( const TheISA::PCState &  val)
pure virtual
virtual void ThreadContext::profileClear ( )
pure virtual
virtual void ThreadContext::profileSample ( )
pure virtual
void ThreadContext::quiesce ( )

Quiesce thread context.

Definition at line 111 of file thread_context.cc.

References DPRINTF, getCpuPtr(), getKernelStats(), name(), and suspend().

Referenced by PseudoInst::quiesce(), and DistIface::toggleSync().

void ThreadContext::quiesceTick ( Tick  resume)

Quiesce, suspend, and schedule activate at resume.

Definition at line 125 of file thread_context.cc.

References DPRINTF, getCpuPtr(), getKernelStats(), getQuiesceEvent(), and suspend().

Referenced by PseudoInst::quiesceCycles(), PseudoInst::quiesceNs(), PseudoInst::quiesceSkip(), and DistIface::toggleSync().

virtual CCReg ThreadContext::readCCReg ( int  reg_idx)
pure virtual
virtual CCReg ThreadContext::readCCRegFlat ( int  idx)
pure virtual
virtual FloatReg ThreadContext::readFloatReg ( int  reg_idx)
pure virtual
virtual FloatRegBits ThreadContext::readFloatRegBits ( int  reg_idx)
pure virtual
virtual FloatRegBits ThreadContext::readFloatRegBitsFlat ( int  idx)
pure virtual
virtual FloatReg ThreadContext::readFloatRegFlat ( int  idx)
pure virtual
virtual Counter ThreadContext::readFuncExeInst ( )
pure virtual
virtual uint64_t ThreadContext::readIntReg ( int  reg_idx)
pure virtual

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by PowerISA::BranchRegCond::branchTarget(), Trace::SparcNativeTrace::check(), cloneFunc(), compare(), PowerISA::copyRegs(), AlphaISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), FreebsdAlphaSystem::doCalibrateClocks(), SparcISA::doNormalFault(), SparcISA::doREDFault(), TimingExprReadIntReg::eval(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), AlphaISA::getArgument(), SparcISA::getArgument(), X86ISA::getArgument(), ArmISA::getArgument(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), PowerLinuxProcess::getSyscallArg(), AlphaProcess::getSyscallArg(), PowerProcess::getSyscallArg(), MipsProcess::getSyscallArg(), RiscvProcess::getSyscallArg(), ArmProcess32::getSyscallArg(), ArmProcess64::getSyscallArg(), Sparc32Process::getSyscallArg(), X86ISA::X86_64Process::getSyscallArg(), Sparc64Process::getSyscallArg(), X86ISA::I386Process::getSyscallArg(), SparcISA::Sparc32LinuxProcess::handleTrap(), SparcISA::Sparc64LinuxProcess::handleTrap(), ArmISA::ArmFault::invoke(), ArmISA::SupervisorCall::invoke(), RiscvISA::SyscallFault::invoke_se(), X86ISA::m5Syscall(), DumpStatsPCEvent::process(), ArmISA::ISA::readMiscReg(), PowerProcess::setSyscallReturn(), SparcProcess::setSyscallReturn(), AlphaISA::skipFunction(), ArmISA::skipFunction(), SparcISA::skipFunction(), MipsISA::skipFunction(), AlphaISA::StackTrace::trace(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), and ArmV8KvmCPU::updateKvmState().

virtual uint64_t ThreadContext::readIntRegFlat ( int  idx)
pure virtual

Flat register interfaces.

Some architectures have different registers visible in different modes. Such architectures "flatten" a register (see flattenIntIndex() and flattenFloatIndex()) to map it into the gem5 register file. This interface provides a flat interface to the underlying register file, which allows for example serialization code to access all registers.

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by ArmISA::copyRegs(), X86ISA::copyRegs(), MipsISA::copyRegs(), ArmKvmCPU::onKvmExitHypercall(), serialize(), and ArmKvmCPU::updateKvmStateCore().

virtual Tick ThreadContext::readLastActivate ( )
pure virtual
virtual Tick ThreadContext::readLastSuspend ( )
pure virtual
virtual MiscReg ThreadContext::readMiscReg ( int  misc_reg)
pure virtual

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by MipsISA::MipsFaultBase::base(), ArmISA::canReadAArch64SysReg(), ArmISA::canWriteAArch64SysReg(), ArmISA::ArmStaticInst::checkAdvSIMDOrFPEnabled32(), ArmISA::ArmStaticInst::checkFPAdvSIMDTrap64(), ArmISA::Interrupts::checkInterrupts(), X86ISA::copyMiscRegs(), ArmISA::currEL(), ArmISA::currOpMode(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), ArmKvmCPU::dumpKvmStateCoProc(), ArmISA::PrefetchAbort::ec(), ArmISA::DataAbort::ec(), ArmISA::ELIs64(), ArmISA::flattenMiscRegNsBanked(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), SparcISA::RemoteGDB::gdbRegs(), ArmISA::getExecutingAsid(), ArmISA::Interrupts::getInterrupt(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::getRestoredITBits(), ArmISA::ArmFault::getVector(), ArmISA::ArmFault::getVector64(), X86ISA::handleIprRead(), ArmISA::illegalExceptionReturn(), ArmISA::inAArch64(), ArmProcess32::initState(), ArmProcess64::initState(), ArmISA::inSecureState(), MipsISA::inUserMode(), MipsISA::CoprocessorUnusableFault::invoke(), ArmISA::ArmFault::invoke(), ArmISA::Reset::invoke(), ArmISA::SupervisorCall::invoke(), X86ISA::InitInterrupt::invoke(), ArmISA::AbortFault< T >::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::ArmFault::invoke64(), ArmISA::isBigEndian64(), X86KvmCPU::kvmRunWrapper(), ArmISA::longDescFormatInUse(), X86ISA::m5PageFault(), X86ISA::m5Syscall(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), ArmISA::ArmFaultVals< T >::offset(), MipsISA::TlbRefillFault::offset(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkAArch64(), ArmISA::TableWalker::processWalkLPAE(), ArmISA::purifyTaggedAddr(), MipsISA::MipsFaultBase::setExceptionState(), ArmISA::ISA::setMiscReg(), MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), ArmISA::SPAlignmentCheckEnabled(), ArmV8KvmCPU::startup(), ArmISA::Interrupts::takeInt(), Trace::ArmNativeTrace::ThreadState::update(), ArmV8KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateMSRs(), X86KvmCPU::updateKvmStateRegs(), X86KvmCPU::updateKvmStateSRegs(), ArmKvmCPU::updateKvmStateVFP(), ArmISA::TLB::updateMiscReg(), and ArmISA::TableWalker::walk().

virtual MiscReg ThreadContext::readMiscRegNoEffect ( int  misc_reg) const
pure virtual

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by ArmISA::AbortFault< T >::abortDisable(), ArmISA::Interrupt::abortDisable(), ArmISA::FastInterrupt::abortDisable(), AlphaISA::RemoteGDB::acc(), archPrctlFunc(), MipsISA::Interrupts::checkInterrupts(), SparcISA::Interrupts::checkInterrupts(), AlphaISA::Interrupts::checkInterrupts(), X86ISA::Interrupts::checkInterrupts(), compare(), AlphaISA::copyIprs(), SparcISA::copyMiscRegs(), AlphaISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), MipsISA::copyRegs(), Linux::ThreadInfo::curThreadInfo(), SparcISA::doNormalFault(), SparcISA::doREDFault(), ArmKvmCPU::dumpKvmStateCoProc(), SparcISA::enterREDState(), X86ISA::TLB::finalizePhysical(), ArmISA::FastInterrupt::fiqDisable(), X86ISA::RemoteGDB::gdbRegs(), MipsISA::getCauseIP(), SparcISA::getExecutingAsid(), AlphaISA::getExecutingAsid(), ArmISA::AbortFault< T >::getFsr(), SparcISA::getHyperVector(), MipsISA::Interrupts::getInterrupt(), AlphaISA::Interrupts::getInterrupt(), SparcISA::Interrupts::getInterrupt(), SparcISA::getPrivVector(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), X86ISA::getRFlags(), ArmISA::ArmFault::getVector(), X86KvmCPU::handleIOMiscReg32(), X86ISA::handleIprWrite(), X86KvmCPU::handleKvmExitIO(), AlphaISA::initCPU(), X86System::initState(), MipsISA::Interrupts::interruptsPending(), AlphaISA::inUserMode(), SparcISA::inUserMode(), X86ISA::inUserMode(), ArmISA::inUserMode(), AlphaISA::AlphaFault::invoke(), SparcISA::SparcFaultBase::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::PowerOnReset::invoke(), MipsISA::ResetFault::invoke(), AlphaISA::DtbFault::invoke(), ArmISA::ArmFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), AlphaISA::ItbFault::invoke(), X86ISA::PageFault::invoke(), ArmISA::VirtualDataAbort::invoke(), AlphaISA::StackTrace::isEntry(), AlphaISA::Kernel::Statistics::mode(), MipsISA::InterruptFault::offset(), MipsISA::Interrupts::onCpuTimerInterrupt(), X86ISA::GpuTLB::pagingProtectionChecks(), IdleStartEvent::process(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), ArmISA::UndefinedInstruction::routeToHyp(), ArmISA::SupervisorCall::routeToHyp(), ArmISA::PrefetchAbort::routeToHyp(), ArmISA::DataAbort::routeToHyp(), ArmISA::Interrupt::routeToHyp(), ArmISA::FastInterrupt::routeToHyp(), ArmISA::SystemError::routeToHyp(), ArmISA::PrefetchAbort::routeToMonitor(), ArmISA::DataAbort::routeToMonitor(), ArmISA::Interrupt::routeToMonitor(), ArmISA::FastInterrupt::routeToMonitor(), ArmISA::SystemError::routeToMonitor(), MipsISA::setCauseIP(), setKvmDTableReg(), setKvmSegmentReg(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), SparcProcess::setSyscallReturn(), X86ISA::GpuTLB::tlbLookup(), AlphaISA::StackTrace::trace(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), AlphaISA::TLB::translateData(), SparcISA::TLB::translateData(), AlphaISA::TLB::translateInst(), SparcISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), Trace::ArmNativeTrace::ThreadState::update(), ArmKvmCPU::updateKvmStateCoProc(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateFPULegacy(), X86KvmCPU::updateKvmStateFPUXSave(), ArmKvmCPU::updateTCStateCore(), SparcISA::vtophys(), and AlphaISA::vtophys().

virtual uint64_t ThreadContext::readRegOtherThread ( int  misc_reg,
ThreadID  tid 
)
inlinevirtual

Definition at line 258 of file thread_context.hh.

virtual unsigned ThreadContext::readStCondFailures ( )
pure virtual
virtual void ThreadContext::regStats ( const std::string &  name)
pure virtual
virtual void ThreadContext::setCCReg ( int  reg_idx,
CCReg  val 
)
pure virtual
virtual void ThreadContext::setCCRegFlat ( int  idx,
CCReg  val 
)
pure virtual
virtual void ThreadContext::setContextId ( int  id)
pure virtual
virtual void ThreadContext::setFloatReg ( int  reg_idx,
FloatReg  val 
)
pure virtual
virtual void ThreadContext::setFloatRegBits ( int  reg_idx,
FloatRegBits  val 
)
pure virtual
virtual void ThreadContext::setFloatRegBitsFlat ( int  idx,
FloatRegBits  val 
)
pure virtual
virtual void ThreadContext::setFloatRegFlat ( int  idx,
FloatReg  val 
)
pure virtual
virtual void ThreadContext::setIntReg ( int  reg_idx,
uint64_t  val 
)
pure virtual

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by AlphaProcess::argsInit(), MipsProcess::argsInit(), PowerProcess::argsInit(), RiscvProcess::argsInit(), SparcProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), cloneFunc(), PowerISA::copyRegs(), AlphaISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), getgidPseudoFunc(), getpidPseudoFunc(), getuidPseudoFunc(), AlphaISA::initCPU(), X86ISA::initCPU(), AlphaProcess::initState(), SparcProcess::initState(), X86ISA::X86FaultBase::invoke(), ArmISA::ArmFault::invoke(), X86ISA::InitInterrupt::invoke(), pipeImpl(), ArmISA::ISA::setMiscReg(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), PowerLinuxProcess::setSyscallArg(), AlphaProcess::setSyscallArg(), PowerProcess::setSyscallArg(), MipsProcess::setSyscallArg(), RiscvProcess::setSyscallArg(), ArmProcess32::setSyscallArg(), ArmProcess64::setSyscallArg(), Sparc32Process::setSyscallArg(), X86ISA::X86_64Process::setSyscallArg(), Sparc64Process::setSyscallArg(), X86ISA::I386Process::setSyscallArg(), AlphaProcess::setSyscallReturn(), PowerProcess::setSyscallReturn(), MipsProcess::setSyscallReturn(), RiscvProcess::setSyscallReturn(), SparcProcess::setSyscallReturn(), ArmProcess32::setSyscallReturn(), X86ISA::X86Process::setSyscallReturn(), ArmProcess64::setSyscallReturn(), and ArmV8KvmCPU::updateThreadContext().

virtual void ThreadContext::setIntRegFlat ( int  idx,
uint64_t  val 
)
pure virtual
virtual void ThreadContext::setMiscReg ( int  misc_reg,
const MiscReg val 
)
pure virtual

Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.

Referenced by cloneFunc(), SparcISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), SparcISA::TLB::doMmuRegWrite(), SparcISA::doNormalFault(), SparcISA::doREDFault(), SparcISA::enterREDState(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), X86KvmCPU::handleIOMiscReg32(), X86ISA::handleIprWrite(), X86ISA::initCPU(), SparcProcess::initState(), ArmProcess32::initState(), ArmProcess64::initState(), X86System::initState(), Sparc32Process::initState(), X86ISA::X86_64Process::initState(), Sparc64Process::initState(), X86ISA::I386Process::initState(), X86ISA::installSegDesc(), SparcISA::PowerOnReset::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), ArmISA::Reset::invoke(), X86ISA::PageFault::invoke(), X86ISA::InitInterrupt::invoke(), ArmISA::AbortFault< T >::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::PCAlignmentFault::invoke(), ArmISA::ArmSev::invoke(), ArmISA::ArmFault::invoke64(), X86KvmCPU::kvmRunWrapper(), X86ISA::m5Syscall(), setContextSegment(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), X86ISA::setRFlags(), ArmISA::ArmFault::setSyndrome(), setTLSFunc32(), setTLSFunc64(), ArmKvmCPU::updateTCStateCore(), ArmKvmCPU::updateTCStateVFP(), X86KvmCPU::updateThreadContext(), and X86KvmCPU::updateThreadContextMSRs().

virtual void ThreadContext::setMiscRegNoEffect ( int  misc_reg,
const MiscReg val 
)
pure virtual
void ThreadContext::setNPC ( Addr  val)
inline

Definition at line 229 of file thread_context.hh.

References pcState().

Referenced by execveFunc().

virtual void ThreadContext::setProcessPtr ( Process p)
pure virtual
virtual void ThreadContext::setRegOtherThread ( int  misc_reg,
const MiscReg val,
ThreadID  tid 
)
inlinevirtual

Definition at line 264 of file thread_context.hh.

virtual void ThreadContext::setStatus ( Status  new_status)
pure virtual
virtual void ThreadContext::setStCondFailures ( unsigned  sc_failures)
pure virtual
virtual void ThreadContext::setThreadId ( int  id)
pure virtual
virtual uint32_t ThreadContext::socketId ( ) const
pure virtual
virtual Status ThreadContext::status ( ) const
pure virtual
virtual void ThreadContext::suspend ( )
pure virtual
virtual void ThreadContext::syscall ( int64_t  callnum,
Fault fault 
)
pure virtual
virtual void ThreadContext::takeOverFrom ( ThreadContext old_context)
pure virtual
virtual int ThreadContext::threadId ( ) const
pure virtual

The documentation for this class was generated from the following files:

Generated on Fri Jun 9 2017 13:04:21 for gem5 by doxygen 1.8.6