WWT Logo WWT Technical Papers


Overview

The Wisconsin Wind Tunnel Project: An Annotated Bibliography, Mark D. Hill, James R. Larus, David A. Wood (unpublished manuscript, revised frequently). Formats: pdf and ps.

Parallel Computer Research in the Wisconsin Wind Tunnel Project Mark D. Hill James R. Larus, David A. Wood (NSF Conference on Experimental Research in Computer Systems, Jun. 1996). Formats: pdf and ps.

Tempest, Typhoon, Blizzard

Typhoon and Tempest: User-Level Shared Memory, Steven K. Reinhardt, James R. Larus, David A. Wood (ACM/IEEE International Symposium on Computer Architecture (ISCA), April 1994). Formats: pdf and ps.

Fine-grain Access Control for Distributed Shared Memory, Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, David A. Wood (The Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), Oct. 1994). Formats: pdf and ps.

Tempest: A Substrate for Portable Parallel Programs, Mark D. Hill James R. Larus, David A. Wood (Compcon, Mar. 1995). Formats: pdf and ps.

Tempest Interface Specification, Steven K. Reinhardt (UW CS TR #1267, Feb. 1995). Formats: pdf and ps.

StormWatch: A Tool for Visualizing Memory System Protocols, , Trishul M. Chilimbi, Thomas Ball, Stephen G. Eick, and James R. Larus (Supercomputing '95, Dec. 1995).

Decoupled Hardware Support for Distributed Shared Memory, Steven K. Reinhardt, Robert W. Pfile, and David A. Wood (23rd International Symposium on Computer Architecture (ISCA), May 1996). Formats: pdf and ps.

Hardware Support for Flexible Distributed Shared Memory, Steven K. Reinhardt, Robert Pfile, and David A. Wood, (IEEE Transactions on Computers, Vol. 47, No. 10, October 1998, pp. 1056-1072). Formats: pdf and ps.

Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory Ioannis Schoinas, Babak Falsafi, Mark D. Hill, James R. Larus, David A. Wood (International Conference on Parallel Architectures and Compilation Techniques (PACT), Oct 1998). Formats: pdf and ps.

Custom Protocols

Application-Specific Protocols for User-Level Shared Memory, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, Ioannis Schoinas, Mark D. Hill James R. Larus, Anne Rogers, David A. Wood (Supercomputing '94, Nov. 1994). Formats: pdf and ps.

Efficient Support for Irregular Applications on Distributed-Memory Machines, Shubhendu S. Mukherjee, Shamik D. Sharma, Mark D. Hill, James R. Larus, Anne Rogers, and Joel Saltz (PPoPP, July 1995). Formats: pdf and ps.

Teapot: Language Support for Writing Memory Coherence Protocols, Satish Chandra, Brad Richards and James R. Larus (SIGPLAN Conference on Programming Languages Design and Implementation (PLDI), May 1996). Formats: pdf and ps.

Experience with a Language for Writing Coherence Protocols, Satish Chandra, Michael Dahlin, Bradley Richards, Randolph Y. Wang, Thomas E. Anderson and James R. Larus (USENIX Conference on Domain-Specific Languages, October 1997). Formats: pdf and ps.

Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors, Alvin R. Lebeck and David A. Wood (ACM/IEEE International Symposium on Computer Architecture (ISCA), June 1995). Formats: pdf and ps.

Compiling for Tempest

Compiling for Shared-Memory and Message-Passing Computers, James R. Larus (ACM LOPLAS, Vol. 2, No. 1-4, March-Dec. 1993). Formats: pdf and ps.

Where is Time Spent in Message-Passing and Shared-Memory Programs?, Satish Chandra, James R. Larus, Anne Rogers (The Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), Oct. 1994). Formats: pdf and ps.

LCM: Memory System Support for Parallel Language Implementation, James R. Larus, Brad Richards, Guhan Viswanathan (The Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), Oct. 1994). Formats: pdf and ps.

HPF on Fine-Grain Distributed Shared Memory: Early Experience, Satish Chandra and James R. Larus (Ninth Workshop on Languages and Compilers for Parallel Computing, August 1996.) Formats: pdf and ps.

Parallel Programming in C**: A Large-Grain Data-Parallel Programming Language, James R. Larus and Brad Richards and Guhan Viswanathan (In: Gregory V. Wilson and Paul Lu, eds., Parallel Programming Using C++, MIT Press 1996). Formats: pdf and ps.

Compiler-directed Shared-Memory Communication for Iterative Parallel Applications, Guhan Viswanathan and James R. Larus (Supercomputing 96, November 1996). Formats: pdf and ps.

Optimizing Communication in HPF Programs on Fine-Grain Distributed Shared Memory, Satish Chandra and James R. Larus (Sixth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, June 1997). Formats: pdf and ps.

Hardware Shared Memory

An Evaluation of Directory Protocols for Medium-Scale Shared-Memory Multiprocessors, Shubhendu S. Mukherjee and Mark D. Hill (International Conference on Supercomputing (ICS), July 1994). Formats: pdf and ps.

Reactive NUMA: A Design for Unifying S-COMA and CC-NUMA, Babak Falsafi and David A. Wood (Proceedings of the 24th International Symposium on Computer Architecture (ISCA), June 1997). Formats: pdf and ps.

Multiprocessors Should Support Simple Memory Consistency Models, Mark D. Hill (IEEE Computer, 1998). Formats: pdf and ps.

Using Prediction to Accelerate Coherence Protocols Shubhendu S. Mukherjee and Mark D. Hill (ACM/IEEE International Symposium on Computer Architecture (ISCA), June 1998). Formats: pdf and ps.

Multicast Snooping: A New Coherence Method Using a Multicast Address Network, E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Plakal, Daniel J. Sorin, Mark D. Hill, David A. Wood (International Symposium on Computer Architecture (ISCA), May 1999). Formats: pdf and ps.

Network Interface Design

Coherent Network Interfaces for Fine-Grain Communication, Shubhendu S. Mukherjee, Babak Falsafi, Mark D. Hill, and David A. Wood (Proceedings of the 23rd International Symposium on Computer Architecture (ISCA), 1996). Raw Data. Formats: pdf and ps.

A Survey of User-Level Network Interfaces for System Area Networks, Shubhendu S. Mukherjee and Mark D. Hill (UW CS TR #1340, Feb. 1997). Formats: pdf and ps.

A Case for Making Network Interfaces Less Peripheral (talk only), Shubhendu S. Mukherjee and Mark D. Hill (Hot Interconnects V, August, 1997). Formats: pdf and ps.

The Impact of Data Transfer and Buffering Alternatives on Network Interface Design Shubhendu S. Mukherjee and Mark D. Hill (Proceedings of the Fourth International Symposium on High-Performance Computer Architecture (HPCA), 1998). Formats: pdf and ps.

Address Translation Mechanisms in Network Interfaces Ioannis Schoinas and Mark D. Hill (Proceedings of the Fourth International Symposium on High-Performance Computer Architecture (HPCA), 1998). Formats: pdf and ps.

Making Network Interfaces Less Peripheral Shubhendu S. Mukherjee and Mark D. Hill (IEEE Computer, 1998) Formats: pdf and ps.

Parallel Dispatch Queue: A Queue-Based Programming Abstraction To Parallelize Fine-Grain Communication Protocols Babak Falsafi and David A. Wood (Proceedings of the 5th International Symposium on High-Performance Computer Architecture (HPCA-5), 1999). Formats: pdf and ps.

Tools

EEL: Machine-Independent Executable Editing, James R. Larus and Eric Schnarr (SIGPLAN '95 Conference on Programming Languages Design and Impelementation (PLDI), June 1995). Formats: pdf and ps.

Active Memory: A New Abstraction For Memory System Simulation, Alvin R. Lebeck and David A. Wood (ACM SIGMETRICS, May 1995). Formats: pdf and ps.

Instruction Scheduling and Executable Editing, Eric Schnarr and James R. Larus (Workshop on Compiler Support for System Software (WCSSS), February 1996). Formats: pdf and ps.

Instruction Scheduling and Executable Editing, Eric Schnarr and James R. Larus (IEEE/ACM Int'l Symp. on Microarchitecture (MICRO-29), Dec. 2-4, 1996, Paris, France). Formats: pdf and ps.

Shared-Memory Performance Profiling, Zhichen Xu, James R. Larus, and Barton P. Miller (6th ACM SIGPLAN Symp. on Principles and Practice of Parallel Programming, June 18-21, 1997, Las Vegas, Nevada). Formats: pdf and ps.

Fast Out-Of-Order Processor Simulation Using Memoization, Eric Schnarr and James R. Larus (8th International Conference on Architectural Support for Programming Languages and Operating Systems, October 4-7, 1998, San Jose, California). Slides. Formats: pdf and ps.

Facile: A Language and Compiler for High-Performance Processor Simulators, Eric Schnarr, Mark D. Hill James R. Larus (Programming Language Design and Implementation, 2001). Formats: pdf.

Cooperative Shared Memory

Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors, Mark D. Hill, James R. Larus, Steven K. Reinhardt, David A. Wood (ACM Transactions on Computer Systems (TOCS), November 1993). Formats: pdf and ps.

Mechanisms for Cooperative Shared Memory, David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, Shubhendu S. Mukherjee, Subbarao Palacharla, Steven K. Reinhardt (ACM/IEEE International Symposium on Computer Architecture (ISCA), May 1993). Formats: pdf and ps.

CICO: A Shared-Memory Programming Performance Model, James R. Larus, Satish Chandra, David A. Wood (Portability and Performance for Parallel Processors, John Wiley & Sons, Ltd., 1994). Formats: pdf and ps.

Solving Microstructure Electrostatics on a Proposed Parallel Computer, Frank Traenkle, Mark D. Hill, Sangtae Kim (Computers and Chemical Engineering, 1995). Formats: pdf and ps.

Parallel Programming Models and Boundary Integral Equation Methods for Microstructure Electrostatics, Frank Traenkle (Masters Thesis (Univ. of Wisconsin--Madison, Ch.E. Dept.), 1993). Formats: pdf and ps.

Cachier: A Tool for Automatically Inserting CICO Annotations, Trishul M. Chilimbi and James R. Larus (International Conference on Parallel Processing (ICPP), August, 1994). Formats: pdf and ps.

Wisconsin Wind Tunnel

The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers, Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, David A. Wood (ACM SIGMETRICS, May 1993). Formats: pdf and ps.

Kernel Support for the Wisconsin Wind Tunnel, Steven K. Reinhardt, Babak Falsafi, David A. Wood (Usenix Symposium on Microkernels and Other Kernel Architectures, September 1993). Formats: pdf and ps.

A Programming Tutorial for the Wisconsin Wind Tunnel, Shubhendu S. Mukherjee, Alan Kagi, and Douglas Burger (Unpublished manuscript, revised January 1995). Formats: pdf and ps.

Cost/Performance of a Parallel Computer Simulator, Babak Falsafi and David A. Wood (SCS PADS, July 1994). Formats: pdf and ps.

Accuracy vs. Performance in Parallel Simulation of Interconnection Networks, Douglas C. Burger and David A. Wood (ACM/IEEE International Parallel Processing Symposium (IPPS), April 1995). Formats: pdf and ps.

Optimistic Simulation of Parallel Architectures Using Program Executables, Sashikanth Chandrasekaran and Mark D. Hill (Workshop on Parallel and Distributed Simulation (PADS), May 1996). Formats: pdf and ps.

Modeling Cost/Performance of a Parallel Computer Simulator, Babak Falsafi and David A. Wood (ACM Transactions on Modeling and Computer Simulation (TOMACS), January 1997). Formats: pdf and ps.

Wisconsin Wind Tunnel II: A Fast and Portable Parallel Architecture Simulator Shubhendu S. Mukherjee, Steven K. Reinhardt, Babak Falsafi, Mike Litzkow, Steve Huss-Lederman, Mark D. Hill, James R. Larus, and David A. Wood. (Workshop on Performance Analysis and Its Impact on Design (PAID), June 1997. Associated with ISCA). Formats: pdf and ps.

Path Profiling

Efficient Path Profiling, Thomas Ball, James R. Larus (MICRO 29, Dec. 1996). Formats: pdf and ps.

Exploiting Hardware Performance Counters with Flow and Context Sensitive Profiling Glenn Ammons, Thomas Ball, James R. Larus (SIGPLAN '97 Conference on Programming Languages Design and Implementation (PLDI), June 1997). Formats: pdf and ps.

Improving Data-flow Analysis with Path Profiles Glenn Ammons and James R. Larus (SIGPLAN '98 Conference on Programming Languages Design and Implementation (PLDI), June 1998). Formats: pdf and ps.

Lamport Clocks

Lamport Clocks: Reasoning About Shared Memory Correctness, Daniel J. Sorin, Manoj Plakal, Mark D. Hill, and Anne E. Condon (Univ. of Wisconsin Computer Sciences Technical Report #1367, March 1998). Formats: pdf and ps.

Lamport Clocks: Verifying A Directory Cache-Coherence Protocol, Manoj Plakal, Daniel J. Sorin, Anne E. Condon and Mark D. Hill (Proceedings of the 10th Annual ACM Symposium on Parallel Architectures and Algorithms (SPAA), 1998). Formats: pdf and ps.

Using Lamport Clocks to Reason About Relaxed Memory Models Anne E. Condon, Mark D. Hill, Manoj Plakal and Daniel J. Sorin, (Proceedings of the 5th International Symposium on High-Performance Computer Architecture (HPCA-5), January 1999). Formats: pdf and ps.

A System-Level Specification Framework for I/O Architectures, Mark D. Hill, Anne E. Condon, Manoj Plakal, and Daniel J. Sorin (Proceedings of the 11th Annual ACM Symposium on Parallel Architectures and Algorithms (SPAA), June 1999). Formats: pdf and ps.

A System-Level Specification Framework for I/O Architectures, Mark D. Hill, Anne E. Condon, Manoj Plakal, and Daniel J. Sorin (Univ. of Wisconsin Computer Sciences Technical Report #1398, March 1999). (This paper contains an appendix that is not present in the above SPAA'99 paper.) Formats: pdf and ps.

Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol, Daniel J. Sorin, Manoj Plakal, Mark D. Hill, Anne E. Condon, Milo M. Martin, and David A. Wood (Univ. of Wisconsin Computer Sciences Technical Report #1412, March 2000). Formats: pdf and ps.

Miscellaneous

Paging Tradeoffs in Distributed-Shared-Memory Multiprocessors, Douglas C. Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood (Supercomputing '94, Nov. 1994). Formats: pdf and ps.

Cost-Effective Parallel Computing, David A. Wood and Mark D. Hill (IEEE Computer, February 1995). Formats: pdf and ps.

Scheduling Communication on an SMP Node Parallel Machine Babak Falsafi and David A. Wood (Proceedings of the Third IEEE Symposium on High-Performance Computer Architecture (HPCA-3), February 1997). Formats: pdf and ps.

Relaxed Consistency and Coherence Granularity in DSM Systems: A Performance Evaluation, Yuanyuan Zhou, Liviu Iftode, Jaswinder Pal Singh, Kai Li, Brian R. Toonen, Ioannis Schoinas, Mark D. Hill, David A. Wood (Sixth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, June 1997). Formats: pdf and ps.

Analytic Evaluation of Shared-Memory Parallel Systems with ILP Processors, Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mary K. Vernon, and David A. Wood (Proceedings of the 25th International Symposium on Computer Architecture (ISCA), 1998). Formats: pdf and ps.

AMVA Techniques for High Service Time Variability, Derek L. Eager, Daniel J. Sorin, and Mary K. Vernon (Proceedings of ACM SIGMETRICS, 2000). Formats: pdf and ps.

Using Generational Garbage Collection to Implement Cache-Conscious Data Placement, Trishul M. Chilimbi and James R. Larus (International Symposium on Memory Management (ISMM'98), October 1998). Formats: pdf and ps.

Cache-Conscious Structure Layout, Trishul M. Chilimbi, Mark D. Hill, and James R. Larus (SIGPLAN Conference on Programming Languages Design and Implementation (PLDI), May 1999). Formats: pdf and ps.

Cache-Conscious Structure Definition, Trishul M. Chilimbi, Bob Davidson, and James R. Larus (SIGPLAN Conference on Programming Languages Design and Implementation (PLDI), May 1999). Formats: pdf and ps.

Making Pointer-Based Data Structures Cache Conscious, Trishul M. Chilimbi, Mark D. Hill, and James R. Larus (IEEE Computer, TBD 2000). Formats: pdf and ps.



Last Updated: 02 May 2005 by Mark Hill