TETRA is a tool for evaluating serial program performance under the resource and control constraints of fine-grain parallel processors. TETRA was written by Todd Austin (austin@cs.wisc.edu). TETRA's primary advantage to the user is its ability to quickly generate performance metrics for yet to be designed architectures. All the user needs to specify is the capabilities of the architecture (e.g., number of functional units, issue model, etc.), rather than its implementation.
TETRA has many options to parameterize the data, control and resource constraints placed on the execution graph it constructs, including control over the execution model's:
When constructing execution graphs with limited resources, TETRA provides five user selectable schedulers, varying in cost, performance, and capability:
In addition, TETRA provides a number of options describing the analyses performed on the constructed execution graph, including generation of:
The software is very modular, allowing it to be easily used as a test bed for new ideas. TETRA is currently only targeted for MIPS- and SPARC-based systems, but porting it to other architectures supported by QPT (or another capable tracer) requires very little coding (just a few constants and an instruction dependency decoder). There are two papers describing the development and application of TETRA, the references are in the manual page (and also available on the Web page).
Even if you're not interested in the amount of parallelism in serial programs, you may still find TETRA useful if you do or are planning to do trace analysis, especially with QPT. Included in the source package are useful goodies including: instruction decoders, disassemblers, and dependency analyzers with machine-independent interfaces (for the MIPS and SPARC architectures), a QPT trace generator, a QPT trace decoder, a GNUPLOT compatible distribution generator, and a portable fixed size heap allocator.
You'll need the following to install TETRA:
TETRA has been tested on the following configurations:
The source release for TETRA version 2.0.0 is available via anonymous ftp at "ftp.cs.wisc.edu" in the file "/sohi/Code/tetra-2.0.0.tar.Z". (Clicking on the highlighted file name will fetch the file to your machine.)
There is a manual page included in the source distribution, which includes installation and user's instructions. In addition, there are two papers describing the implementation and application of TETRA.
TETRA: Evaluation of Serial Program Performance on Fine-Grain Parallel Processors, Todd M. Austin and Gurindar S. Sohi, University of Wisconsin - Madison Technical Report #1162, July 1993.
Dynamic Dependency Analysis of Ordinary Programs, Todd M. Austin and Gurindar S. Sohi, Proceedings of the 19th Annual International Symposium on Computer Architecture, May 1992.
TETRA is the result of research conducted by Todd Austin and Guri Sohi of the Wisconsin Multiscalar Group at the University of Wisconsin - Madison. TETRA was written by Todd Austin (austin@cs.wisc.edu). Portions of the code were written and/or copyrighted by Alain Kägi (author of the Fibonacci heap code) and The Regents of the University of California (developer the AVL tree code). The development of this code was supported by grants from the National Science Foundation (grant CCR-9303030 plus software capitalization supplement) and the Office of Naval Research (grant N00014-93-1-0465).