============= Jichuan Chang ============= ## Work Address: 1210 W. Dayton Street University of Wisconsin-Madison Computer Sciences Department Madison, WI 53706 ## Office: (608)-262-6618 ## Fax: (608)-262-9777 ## Email: chang@cs.wisc.edu ## http://www.cs.wisc.edu/~chang Research Interests ================== Computer architecture: focusing on cache/memory hierarchy design for multicore systems; cache coherence, synchronization and value communication; and hardware support to improve programmability and reliability. Education ========= Ph.D. in Computer Sciences, expected Spring 2007 University of Wisconsin-Madison Advisor: Professor Guri Sohi Dissertation: Cooperative Caching for Chip Multiprocessors M.Sc in Computer Sciences, May 2003 (GPA 4.0/4.0) University of Wisconsin-Madison M.Sc in Computer Sciences, July 2000 (GPA 3.95/4.0) B.S in Computer Sciences, July 1997 (GPA 3.86/4.0) Peking University, Beijing, China Publications ============ Available at http://www.cs.wisc.edu/~chang/publications.html * Jichuan Chang and Gurindar S. Sohi "Cooperative Cache Partitioning for Chip Multiprocessors," Under submission for publication. * Jichuan Chang and Gurindar S. Sohi "Cooperative Caching for Chip Multiprocessors," 33rd Annual Intl. Symposium on Computer Architecture (ISCA-33), June 2006. * Jaehyuk Huh, Doug Burger, Jichuan Chang and Gurindar S. Sohi "Speculative Incoherent Cache Protocols," IEEE Micro 24(6) - Micro's Top Picks, November-December 2004. * Jaehyuk Huh, Jichuan Chang, Doug Burger and Gurindar S. Sohi "Coherence Decoupling: Making Use of Incoherence," ASPLOS-XI, October 2004. * Jichuan Chang, Jaehyuk Huh, Rajagopalan Desikan, Doug Burger and Gurindar S. Sohi "Using Coherent Value Speculation to Improve Multiprocessor Performance," First Value Prediction Workshop, June 2003. * David Garlan, Bradley Schmerl and Jichuan Chang "Using Gauges for Architecture-based Monitoring and Adaptation," Working Conference on Complex and Dynamic Systems Architecture, December 2001. * Software engineering papers available at http://www.cs.wisc.edu/,chang/publications.html#software_engr Experiences =========== 2002-Now ~~ Multiscalar group, University of Wisconsin-Madison Cache coherence and synchronization; Multicore caching and cache partitioning. 2001-2002 ~~ Condor project, University of Wisconsin-Madison Middleware and programming framework for master-worker (MW) style parallel computing. 2000-2001 ~~ ABLE group, Carnegie Mellon University Software architecture based introspection and adaptation. 1996-2000 ~~ Software Engineering Institute, Peking University Software architecture, software component composition, object-oriented middleware. 1998-1999 ~~ Graduate Teaching Assistant, Peking University Undergraduate Operating Systems. Computer Skills =============== * Computer Languages/Platforms: C, C++, Java, Pascal, Visual Basic, Excel, assembly languages, scripting languages; MS Windows/DOS, Unix/Linux, Solaris; Simics-based full system simulation and Simics/MAI. * Software Engineering Experiences: Object-oriented analysis and design, GUI development, project management and processor improvement, software architecture evaluation. Courses Projects ================ * Secure Online Voting System using SSL and XML * Effect of Branch Prediction on Conjunctive Selection Evaluation * Fail-stutter Behavior Characterization of NFS * Lock Behavior Characterization of Commercial Workloads * Analytical Evaluation of Commercial Workloads on Multiprocessors * Software Controlled Prefetching on UltraSparc * Decoupled Architecture for Data Prefetching * Fast Block Copy Support in DRAM * Text (close-captions) Segmentation in the Informedia project * Evaluation of Internet Queue Management Algorithms * Investigating the Consensus Problem in HLA Bridge * Scalable Bio-Surveillance System Architecture Personal Information ==================== * Nationality: People's Republic of China * Status: Student Visa (F-1) References (available upon request) =================================== [ Last Updated: Jan. 2007 ]