Problem 1

The logic circuit for this logic expression is:

Problem 2

1. The output is 1 only when more than two of the inputs are 1. Therefore, the truth table is:

   A B C D 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1

   Z 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 1

2. A simple way to derive the logic expression from every truth table is to follow the method presented in Problem 5:

   1. Locate the lines in the truth table where the output becomes 1.
   2. For each of these lines, find the circuit of AND and NOT gates that gives an output of 1.
   3. Connect those outputs as inputs in a big OR gate.

   Applying this method to the truth table above gives us:

   • For ABCD=0111, the expression (A AND B AND C AND D) is true.
   • For ABCD=1011, the expression (A AND B AND C AND D) is true.
   • For ABCD=1101, the expression (A AND B AND C AND D) is true.
   • For ABCD=1110, the expression (A AND B AND C AND D) is true.
   • For ABCD=1111, the expression (A AND B AND C AND D) is true.

   Therefore, one logic expression which is equivalent to the truth table shown above is: Z = (A AND B AND C AND D) OR (A AND B AND C AND D) OR (A AND B AND C AND D) OR (A AND B AND C AND D) OR (A AND B AND C AND D).

   Notice that the solution produced by this method is correct, albeit it's more verbose than necessary. The process of coming up with an optimal solution is called minimization. A minimized expression for this problem is Z = (A AND B AND (C OR D)) OR ((A OR B) AND C AND D).

Problem 3

1. The truth table for this circuit is:

   A B 0 0 0 1 1 0 1 1

   C D 1 1 1 0 0 1 0 0

   Z 0 1 1 1

2. Z = A OR B

Problem 4

1. The truth table is:

   A B 0 0 0 1 1 0 1 1

   A B 1 1 1 0 0 1 0 0

   A OR B 1 1 1 0

   NOT(A OR B) 0 0 0 1

2. The expression (NOT(A OR B)) is equivalent to the expression (A AND B).

3. DeMorgan's law.

Problem 5

1. The circuit is:

   

2. The circuit is:

   

3. The completed circuit is:

   

4. Recall that:
   (A AND B) OR (C AND D) =
   NOT(NOT((A AND B) OR (C AND D)) =
   NOT(NOT(A AND B) AND NOT(C AND D)) =
   (A NAND B) NAND (C NAND D)
   

   The transistor circuit is:

   

Problem 6

Recall that a b-digit binary number can store a maximum of 2^b different numbers. Therefore a 14-bit adress can store 2¹⁴ different memory positions. Since our memory is byte-addressable, this means that our memory consists of 2¹⁴*2³=2¹⁴⁺³=2¹⁷ bits. And because each nibble is 4-bits, our memory can store 2¹⁷/2²=2^17-2=2¹⁵=32768 nibbles.

Notice how representing everything in powers of 2 can make the math easier. That's why all computer people love powers of 2!

Problem 7

Observe that:

• D = A AND B
• E = B OR C
• F = D AND E
• G = D OR F
• Z = G AND F

The truth table for this circuit is:

A B C 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

D E F G 1 0 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 1 0 0 0 1 0 1 0 1 0 1

Z 0 0 0 0 0 0 0 0

Problem 8

1. The three-input AND gate is:

   

   The three-input OR gate is:

   

2. For A=1, B=0, C=0, the AND gate becomes:

   

   For A=1, B=0, C=0, the OR gate becomes:

   

   For A=0, B=0, C=0, the AND gate becomes:

   

   For A=0, B=0, C=0, the OR gate becomes:

   

   For A=1, B=1, C=1, the AND gate becomes:

   

   For A=1, B=1, C=1, the OR gate becomes: