build /bnf2/cad/fwo/phd/examples/adders/adder.32.sim
options seeallsettings
options seealldelays
options seeallflows
capacitance 1.033 adder_<0:15>/sum adder.flip_<0:15>/sum adder_0/cout
inputs adder.flip_15/cin
inputs adder_<0:15>/a
inputs adder_<0:15>/b
inputs adder.flip_<0:15>/a
inputs adder.flip_<0:15>/b
outputs adder_<0:15>/sum
outputs adder.flip_<0:15>/sum
outputs adder_0/cout
block adder_6/cin
delay adder.flip_15/cin 0 0
delay adder_<0:15>/a 0 0
delay adder_<0:15>/b 0 0
delay adder.flip_<0:15>/a 0 0
delay adder.flip_<0:15>/b 0 0
critical
