CS/ECE 755: Discussion I
Agenda:
- HW 2
- The Mentor Toolset: Big Picture
- Standard-Cells Methodology
The Big Picture
Standard Cells Methodology
scn08hp library:
- ANDs and ORs with 2,3,4 inputs,
- NANDs and NORs with 2,3,4 inputs (with or without buffered output),
- Buffers and Tri-State Buffers (three sizes),
- 2-input mux
- D-latch (set, reset)
- D-flip-flop (set, reset)
- XOR, XNOR (2-inputs)
- AO-112 to -444
- AOI-112 to -444
- OA-112 to -444
- OAI-112 to -444
Design Architect (Tutorial 1)
Quicksim II (Tutorial 2)
IC Station - Automatic Layout (Tutorial 3)
Stage 1: floorplan
Stage 2: cell placement
Stage 3: port placement
Stage 4: routing
Stage 5: compaction
Layout-Versus-Schematic (LVS) checks
Quicksim w/ backannotations