Problem 1
F = not((A.B) + (B.C) + (A.C))
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Problem 2
Logic diagram for Odd parity on eight input bits
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CMOS implementation of XNOR gate
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Problem 3
Truth table for 2 to 4 decoder
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From the truth table we get:
D0 = S0'.S1' = (S0 + S1)'
D1 = S0.S1' = (S0' + S1)'
D2 = S0'.S1 = (S0 + S1')'
D3
= S0'.S1' = (S0'+ S1')'
a) Implementation
using CMOS gates
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b) Implementation using Transmission
gates
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