My dissertation work with Professor Karu Sankaralingam focused on leveraging idempotence for recovery in architecture, compiler, and software design. My extensions to LLVM as part of my dissertation are available here.
Compiler Construction of Idempotent Regions and Applications
in Architecture Design.
PhD Thesis, University of Wisconsin-Madison, 2012.
(Defense slides:
pptx,
pdf)
M. de Kruijf and K. Sankaralingam
Idempotent Code Generation: Implementation, Analysis, and
Evaluation.
CGO '13: Code Generation and Optimization, 2013.
W. Zhang, M. de Kruijf, A. Li, S. Lu, and K. Sankaralingam
ConAir: Featherweight Concurrency Bug Recovery Via
Single-Threaded Idempotent Re-execution.
ASPLOS '13: Architectural Support for Programming Languages and
Operating Systems, 2013.
J. Menon, M. de Kruijf, and K. Sankaralingam
iGPU: Exception Support and Speculative Execution on GPUs.
ISCA '12: International Symposium on Computer Architecture, 2012.
M. de Kruijf, K. Sankaralingam, and S. Jha
Static Analysis and Compiler Design for Idempotent Processing.
(Slides:
pptx,
pdf)
PLDI '12: Programming Language Design and Implementation, 2012.
C.-H. Ho, M. de Kruijf, K. Sankaralingam, B. Rountree, M. Schulz, and B. R. de Supinski
Mechanisms and Evaluation of Cross-Layer Fault-Tolerance for Supercomputing.
ICPP '12: International Conference on Parallel Processing, 2012.
M. de Kruijf, and K. Sankaralingam
Idempotent Processor Architecture.
(Slides:
pptx,
pdf)
MICRO '11: International Symposium on Microarchitecture, 2011.
S. Nomura, M. Sinclair, C. Ho, V. Govindaraju, M. de Kruijf, and
K. Sankaralingam
Sampling + DMR: Practical and Low-overhead Permanent Fault
Detection.
ISCA '11: International Symposium on Computer Architecture, 2011.
M. de Kruijf, S. Nomura, and K.Sankaralingam.
Relax: An Architectural Framework for Software Recovery of
Hardware Faults.
(Slides:
pptx)
ISCA '10: International Symposium on Computer Architecture, 2010.
A. Kumar, L. De Carli, S. J. Kim, M. de Kruijf,
K. Sankaralingam, C. Estan, and S. Jha.
Design and Implementation of the PLUG Architecture for
Programmable and Efficient Network Lookups.
PACT '10: International Conference on Parallel Architectures and
Compilation Techniques, 2010.
M. de Kruijf, S. Nomura, and K.Sankaralingam.
A Unified Model for Timing Speculation: Evaluating the Impact
of Technology Scaling, CMOS Design Style, and Fault Recovery
Mechanism.
(Slides:
pptx)
DSN '10: International Conference on Dependable Systems and Networks, 2010.
M. de Kruijf and K. Sankaralingam.
MapReduce for the CELL B.E. Architecture.
IBM Journal of Research and Development 53:5, 2009.
M. de Kruijf, K. Sankaralingam, and S. Jha
Compiler Construction of Idempotent Regions.
University of Wisconsin Computer Sciences Technical Report CS-TR-2010-1700, 2011.
M. de Kruijf, S. Nomura, and K. Sankaralingam.
The Design, Modeling, and Evaluation of the Relax Architectural
Framework.
University of Wisconsin Computer Sciences Technical Report CS-TR-2010-1672, 2010.
M. de Kruijf and K.Sankaralingam.
Exploring the Synergy of Emerging Workloads and Silicon
Reliability Trends.
SELSE '09: IEEE Workshop on Silicon Errors in Logic – System Effects, 2009.
M. de Kruijf and K. Sankaralingam.
MapReduce for the Cell B.E. Architecture.
(Slides: ppt)
University of Wisconsin Computer Sciences Technical Report CS-TR-2007-1625, 2007.