volatile ram dram e.g. ddr sdram sram in development t ram z ram historical williams kilburn tube 1946 47 delay line memory 1947 selectron tube 1953 dekatron non volatile rom mask rom prom eprom eeprom nvram flash memory solid state storage early stage nvram nvsram feram mram pram mechanical magnetic tape hard disk drive optical disc drive in development 3d xpoint cbram sonos rram racetrack memory nram millipede memory fjg ram historical paper data storage 1725 drum memory 1932 magnetic core memory 1949 plated wire memory 1957 core rope memory 1960s thin film memory 1962 twistor memory 1968 bubble memory 1970 v t e nano ram is a proprietary computer memory technology from the company nantero . it is a type of nonvolatile random access memory based on the position of carbon nanotubes deposited on a chip like substrate . in theory the small size of the nanotubes allows for very high density memories . nantero also refers to it as nram . contents 1 technology 2 characteristics 3 comparison with other non volatile memory 4 history 5 see also 6 references 7 external links technology edit the first generation nantero nram technology was based on a three terminal semiconductor device where a third terminal is used to switch the memory cell between memory states . the second generation nram technology is based on a two terminal memory cell . the two terminal cell has advantages such as a smaller cell size better scalability to sub 20 nm nodes see semiconductor device fabrication and the ability to passivate the memory cell during fabrication . in a non woven fabric matrix of carbon nanotubes cnts crossed nanotubes can either be touching or slightly separated depending on their position . when touching the carbon nanotubes are held together by van der waals forces . each nram cell consists of an interlinked network of cnts located between two electrodes as illustrated in figure 1 . the cnt fabric is located between two metal electrodes which is defined and etched by photolithography and forms the nram cell . carbon nanotube fabric the nram acts as a resistive non volatile random access memory ram and can be placed in two or more resistive modes depending on the resistive state of the cnt fabric . when the cnts are not in contact the resistance state of the fabric is high and represents an off or 0 state . when the cnts are brought into contact the resistance state of the fabric is low and represents an on or 1 state . nram acts as a memory because the two resistive states are very stable . in the 0 state the cnts or a portion of them are not in contact and remain in a separated state due to the stiffness of the cnts resulting in a high resistance or low current measurement state between the top and bottom electrodes . in the 1 state the cnts or a portion of them are in contact and remain contacted due to van der waals forces between the cnts resulting in a low resistance or high current measurement state between the top and bottom electrodes . to switch the nram between states a small voltage greater than the read voltage is applied between top and bottom electrodes . if the nram is in the 0 state the voltage applied will cause an electrostatic attraction between the cnts close each other causing a set operation . after the applied voltage is removed the cnts remain in a 1 or low resistance state due to physical adhesion van der waals force with an activation energy ea of approximately 5ev . if the nram cell is in the 1 state applying a voltage greater than the read voltage will generate cnt phonon excitations with sufficient energy to separate the cnt junctions . this is the phonon driven reset operation . the cnts remain in the off or high resistance state due to the high mechanical stiffness young s modulus 1 tpa with an activation energy ea much greater than 5 ev . figure 2 illustrates both states of an individual pair of cnts involved in the switch operation . due to the high activation energy 5ev required for switching between states the nram switch resists outside interference like radiation and operating temperature that can erase or flip conventional memories like dram . figure 2 carbon nanotube contact points nrams are fabricated by depositing a uniform layer of cnts onto a prefabricated array of drivers such as transistors as shown in figure 1 . the bottom electrode of the nram cell is in contact with the underlying via electronics connecting the cell to the driver . the bottom electrode may be fabricated as part of the underlying via or it may be fabricated simultaneously with the nram cell when the cell is photolithographically defined and etched . before the cell is photolithographically defined and etched the top electrode is deposited as a metal film onto the cnt layer so that the top metal electrode is patterned and etched during the definition of the nram cell . following the dielectric passivation and fill of the array the top metal electrode is exposed by etching back the overlying dielectric using a smoothing process such as chemical mechanical planarization . with the top electrode exposed the next level of metal wiring interconnect is fabricated to complete the nram array . figure 3 illustrates one circuit method to select a single cell for writing and reading . using a cross grid interconnect arrangement the nram and driver the cell forms a memory array similar to other memory arrays . a single cell can be selected by applying the proper voltages to the word line wl bit line bl and select lines sl without disturbing the other cells in the array . figure 3 cnt switch characteristics edit nram has a density at least in theory similar to that of dram . dram includes capacitors which are essentially two small metal plates with a thin insulator between them . nram has terminals and electrodes roughly the same size as the plates in a dram the nanotubes between them being so much smaller they add nothing to the overall size . however it seems there is a minimum size at which a dram can be built below which there is simply not enough charge being stored on the plates . nram appears to be limited only by lithography . this means that nram may be able to become much denser than dram perhaps also less expensive . unlike dram nram does not require power to refresh it and will retain its memory even after power is removed . thus the power needed to write and retain the memory state of the device is much lower than dram which has to build up charge on the cell plates . this means that nram might compete with dram in terms of cost but also require less power and as a result also be much faster because write performance is largely determined by the total charge needed . nram can theoretically reach performance similar to sram which is faster than dram but much less dense and thus much more expensive . comparison with other non volatile memory edit compared with other non volatile random access memory nvram technologies nram has several advantages . in flash memory the common form of nvram each cell resembles a mosfet transistor with a control gate cg modulated by a floating gate fg interposed between the cg and the fg . the fg is surrounded by an insulating dielectric typically an oxide . since the fg is electrically isolated by the surrounding dielectric any electrons placed on the fg will be trapped on the fg which screens the cg from the channel of the transistor and modifies the threshold voltage vt of the transistor . by writing and controlling the amount of charge placed on the fg the fg controls the conduction state of the mosfet flash device depending on the vt of the cell selected . the current flowing through the mosfet channel is sensed to determine the state of the cell forming a binary code where a 1 state current flow when an appropriate cg voltage is applied and a 0 state no current flow when the cg voltage is applied . after being written to the insulator traps electrons on the fg locking it into the 0 state . however in order to change that bit the insulator has to be overcharged to erase any charge already stored in it . this requires higher voltage about 10 volts much more than a battery can provide . flash systems include a charge pump that slowly builds up power and releases it at higher voltage . this process is not only slow but degrades the insulators . for this reason flash has a limited number of writes before the device will no longer operate effectively . nram reads and writes are both low energy in comparison to flash or dram for that matter due to refresh meaning nram could have longer battery life . it may also be much faster to write than either meaning it may be used to replace both . modern phones include flash memory for storing phone numbers dram for higher performance working memory because flash is too slow and some sram for even higher performance . some nram could be placed on the cpu to act as the cpu cache and more in other chips replacing both the dram and flash . nram is one of a variety of new memory systems many of which claim to be universal in the same fashion as nram replacing everything from flash to dram to sram . an alternative memory ready for use is ferroelectric ram fram or feram . feram adds a small amount of a ferro electric material to a dram cell . the state of the field in the material encodes the bit in a non destructive format . feram has advantages of nram although the smallest possible cell size is much larger than for nram . feram is used in applications where the limited number of writes of flash is an issue . feram read operations are destructive requiring a restoring write operation afterwards . other more speculative memory systems include magnetoresistive random access memory mram and phase change memory pram . mram is based on a grid of magnetic tunnel effect junctions . mram s reads the memory using the tunnel magnetoresistance effect allowing it to read the memory both non destructively and with very little power . early mram used field induced writing 1 reached a limit in terms of size which kept it much larger than flash devices . however new mram techniques might overcome the size limitation to make mram competitive even with flash memory . the techniques are thermal assisted switching tas 2 developed by crocus technology and spin torque transfer on which crocus hynix ibm and other companies were working in 2009 . 3 pram is based on a technology similar to that in a writable cd or dvd using a phase change material that changes its magnetic or electrical properties instead of its optical ones . the pram material itself is scalable but requires a larger current source . nantero inc. type private industry semiconductors nanotechnology founded 2001 headquarters woburn massachusetts us products nano ram website www.nantero.com history edit nantero was founded in 2001 and headquartered in woburn massachusetts . due to the massive investment in flash semiconductor fabrication plants no alternative memory has replaced flash in the marketplace despite predictions as early as 2003 of the impending speed and density of nram . 4 5 in 2005 nram was promoted as universal memory and nantero predicted it would be in production by the end of 2006 . 6 in august 2008 lockheed martin acquired an exclusive license for government applications of nantero