ISA -2


Today
-----
- Control Instructions
- MIPS ISA overview
- Other ISAs


Control Instructions
--------------------

Changes the sequence of the program execution. These occur in the program due to
- control statements and loops - if/switch/for/while etc.
- procedure calls
- exceptions

The branching(change of control) can be conditional/unconditional. In all above cases the address of the PC is changed.

The decision can be done whether to branch can be taken using:

- Comparing two registers/reg-to-mem/reg-to-immediate.
- Condition Codes - Flag registers.
- Condition Registers.

The decision of where to branch can be taken as one of:
- relative
- absolute
- indirect


To jump backwards use sign extends
PC = PC + SEXT[inst 0-15]

To jump to 32 bit quantities use zero extends:
PC = PC + ZEXT[inst 0 -15]



Example of branching
--------------------

if (A<B) A++;
else B++;
.....

     slt$S3, $S1, $S2
     beqm $S3, else
     addi $S1,$S1,1
     jmp join
else: add $S2,$s2,1
     join: ......

MIPS
----
- MIPS instruction format: http://pages.cs.wisc.edu/~kadav/cs552/notes/mips.gif
- MIPS registers: http://pages.cs.wisc.edu/~kadav/cs552/notes/mips-reg.gif
- Also refer to the notes from last class.

RISC vs CISC
------------

CISC - Complex Instruction Set Computer.
RISC - Reduced Instruction Set Computer.

RISC   
- Each instruction is simple, but runs very fast. This simplicity gives regularity.
- Reducing the addressing mode , so the architecture becomes  simple and results in faster implementation.
- All the complex instructions are implemented using simple instructions. Simple instructions can be encoded easily and in a constant length format.
- It supports very few addressing modes like Register Addressing mode, Immediate Addressing mode, and Displacement Addressing mode.  

CISC
	
- As there are complex instruction sets, it may run slowly.
- It has more no. of addressing modes, so architecture is complex.
- The instruction format may not be constant length, it may of variable length.