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CS/ECE 752 Advanced Computer Architecture I
Instructor: Karu Sankaralingam; URL: http://www.cs.wisc.edu/~karu
Meeting time: MECH ENGR 1143, 01:00 PM - 02:15 PM, MWF
Office hours: Monday,Wednesday 3-4pm, Thursday: 11-12am
TA: Derek Hower
Course URL: http://www.cs.wisc.edu/~karu/courses/cs752/Spring2007/
Mailing list: compsci752-1-s07@lists.wisc.edu
Important dates
Exam 1: March 5
Exam 2: April 27
Project plan due: March 09
Project proposal due: March 23
Project progress report due: April 23
Project presentations: May 14,16
Project report due: May 18
Full Schedule
Week
Date
(Day) Lecture
Topic
Reading
Review due
Homework given
Homework due
Project
1
01/22/07
(Mon) 1
Intro, What is Computer Architecture, Technology Trends, Performance
1
01/24/07
(Wed) 2
Computer components, ISA overview (MIPS)
H&P Chap 1, B.1-B.7, Moore paper
Moore, Cramming More Components onto Integrated Circuits
HW 1
1
01/26/07
(Fri) 3
ISA Extensions and alternate ISAs
H&P B.8-B.12
Patterson, Latency lags bandwith
2
01/29/07
(Mon)
No class
2
01/31/07
(Wed) 4
Basic computer architecture, microarchitecture
Colwell et al.,Instructions Sets and Beyond: Computers, Complexity, and Concurrency
2
02/02/07
(Fri) 5
Pipelining and pipeline analyses
H&P Appendix A, Hrishikesh paper
Emer and D. W. Clark. A Characterization of Processor Performance in the VAX-11/780
HW 2
HW 1
3
02/05/07
(Mon) 6
ILP: OOO instruction scheduling, register renaming
H&P 2.1-2.2
Dan Ernst, et al., A Low-Power Pipeline Based on Circuit-Level Timing Speculation.
3
02/07/07
(Wed) 7
ILP: Memory reordering, instruction fetch (branch prediction)
H&P 2.3-2.5
Guri Sohi and S. Vajapeyam. Instruction Issue Logic for High-Performance, Interruptible, Multiple Functional Unit, Pipelined Computers,
3
02/09/07
(Fri)
No class
4
02/12/07
(Mon) 8
ILP: Register renaming, deep speculation
H&P 2.6-2.9, Smith paper
Hartstein and Puzak, Optimum Power/Performance Pipeline Depth
4
02/14/07
(Wed) 9
ILP: Reorder buffer, memory disambiguation, the P4 microarchitecture, Limits
H&P 2.10
T-Y. Yeh and Y. Patt. Two-level Adaptive Training Branch Prediction
4
02/16/07
(Fri)
No class
Yeager. The MIPS R10000 Superscalar Microprocessor
5
02/19/07
(Mon) 10
ILP: SMT, Static approaches to ILP
H&P 3.1-3.9, Rau and Fisher paper, skim Appendix G
Sethumadhavan et al., Scalable Hardware Memory Disambiguation for High-ILP Processors
HW 3
HW 2
5
02/21/07
(Wed) 11
Caches: locality and impact of parameters on performance
H&P 5.1-5.2, C.1-C.3
5
02/23/07
(Fri)
No class
Joseph A. Fisher. Very Long Instruction Word architectures and the ELI-512
Start thinking about project!
6
02/26/07
(Mon) 12
Caches: locality and impact of parameters on performance
H&P 5.3, Jouppi paper
C. McNairy and D. Soltis, Itanium 2 Processor Microarchitecture
6
02/28/07
(Wed) 13
Summary of advanced topics
Norman P. Jouppi. Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers
6
03/02/07
(Fri)
Review
HW 3
7
03/05/07
(Mon)
Exam 1
7
03/07/07
(Wed) 15
Main/Virtual Memory: translation, operating system issues, cache issues
H&P 5.4 – 5.5
Kim et al.,An Adaptive, Non-Uniform Cache Structure for Wire-Dominated On-Chip Caches
7
03/09/07
(Fri) 16
Graphics architectures
HW 4
Project ideas email
8
03/12/07
(Mon) 17
Virtual Memory
H&P Chapter 5.3 – 5.9, C.4 – C.8
Peter Vogt, Fully Buffered DIMM Server Memory Architecture
8
03/14/07
(Wed) 18
Virtual Memory II; Start thinking about project
Jacob and Trevor Mudge. Virtual Memory on Contemporary Processors
8
03/16/07
(Fri)
No class
9
03/19/07
(Mon) 19
Virtual Machines
9
03/21/07
(Wed) 20
Vectors
H&P Appendix F: Vector Processors
Richard M. Russell. The Cray-1 Computer System
9
03/23/07
(Fri)
Project proposal presentations; proposals due
Proposal due
10
03/26/07
(Mon) 22
Storage
H&P 6.1-6.11
10
03/28/07
(Wed) 23
Finish storage
HW 4
10
03/30/07
(Fri)
No class
11
04/02/07
(Mon)
Spring break
11
04/04/07
(Wed)
Spring break
11
04/06/07
(Fri)
Spring break
12
04/09/07
(Mon) 24
Multithreading and multiprocessors
H&P 3.5
David A. Patterson, Garth Gibson, and Randy H. Katz, A Case for Redundant Arrays of Inexpensive Disks (RAID)
12
04/11/07
(Wed) 25
Multithreading and multiprocessors
Skim H&P chapter 4
12
04/13/07
(Fri)
No class
13
04/16/07
(Mon) 26
Interconnection networks
Skim Appendix E
13
04/18/07
(Wed) 27
Technology Trends and Concurrency
1) Borkar: Designing Reliable Systems from Unreliable Components, 2:Edmondson, Impact of Technology on Architecture, and 3) Sutter: Free lunch is over
13
04/20/07
(Fri)
Expo no class
14
04/23/07
(Mon)
Progress report; Review
Progress report due
14
04/25/07
(Wed)
No class
14
04/27/07
(Fri)
Exam 2
15
04/30/07
(Mon)
No class
15
05/02/07
(Wed)
No class
15
05/04/07
(Fri)
No class
16
05/07/07
(Mon)
No class
16
05/09/07
(Wed)
No class
16
05/11/07
(Fri)
No class
Presentations
17
05/14/07
(Mon)
Presentations
Presentations
17
05/16/07
(Wed)
Presentations
Presentations
17
05/18/07
(Fri)
Presentations and Reports due
Reports
18
05/21/07
(Mon)
18
05/23/07
(Wed)
Grades in