SAISURESH KRISHNAKUMARAN ksai@cs.wisc.edu OBJECTIVE: Seeking an internship position in Computer Sciences for Summer 2005. AREAS OF INTEREST: Computer Architecture, Operating Systems and Database Systems. OFFICE ADDRESS: 5385, Department of Computer Sciences, 1210 W. Dayton St., Madison, WI 53706-1685. USA Phone: 1-608-2621079 MAILING ADDRESS: 40 North Orchard Street, Madison, WI - 53715 USA EDUCATION: University of Wisconsin-Madison: M.S. Computer Sciences, MAY 2006 Courses Taken in Fall 2004 CS752 - Advanced Computer Architecture. CS764 - Topics in Database Management Systems Anna University Chennai, India: B.E. Computer Science and Engineering, April 2004 GPA 9.542/10 Class Rank - 1 EXPERIENCE: TA (Teaching Assistant) for CS367 in Fall 2004 - Introduction to Data Structures PUBLICATION: Saisuresh Krishnakumaran, Sai Arunachalam, - 'Towards economic Trace Caches-a profile based approach', Poster session of the 10th International Conference on High Performance Computing 2003, Hyderabad, India. ACHIEVEMENTS: + My Team (TEAM Q) was placed SECOND among 187 teams in the 2004 ACM North Central America Programming Contest. + Department topper in Anna University. + Tamil Nadu Engineering Admission: Ranked 3rd in the state (out of 100000 students who appeared for Tamil Nadu Professional Courses Entrance Examination) COMPUTER SKILLS: Operating systems: LINUX, UNIX, Windows. Programming languages: C, C++, JAVA, Intel 8086 Assembly Tools: Lex, Yacc Simulators: SimpleScalar (Architecture Simulator) Others: SQL, VHDL, Handel-C, Shell scripts PROJECTS: 1. A Soft Core Processor for Parameterized HPL-PD Architecture. Its main purpose is to serve as a vehicle to investigate processor architecture having significant parallelism. The soft-core would be a reliable model to analyze the performance of custom architectures and would facilitate in decreasing the time for hardware realization. 2. Re-configurable Architectural Kit (RAK). RAK is aimed developing a kit (implemented in VHDL) that would serve as a platform to study and analyze the performance of various static processor configurations. 3. Implementation of 'Dynamic Instruction Reuse' using SimpleScalar. 4. A C compiler using LEX and YACC. 5. Disk access optimization using deferred copy and disk block sharing in UNIX file system. Added fields in the Inode and disk block structures of the UNIX file system. These fields were manipulated by new system calls in order optimize the disk block accesses. 6. Implementation of a mail server and a messenger designed using Rational Rose. 7. Device Driver for a virtual CD drive in Linux environment. 8. Simulation of the Control Logic for an Automatic Teller Machine using VHDL. 9. Automatic Traffic Controller - Hardware Project. 10. Simulation of Task Scheduling and Interrupt Processing by Microprocessors. AWARDS RECEIVED: + Late Thiru A. Muralitharan Endowment Prize, a Gold medal by College of Engineering Guindy, Anna University for securing the highest marks in the second year of my undergraduate study. + 1951 Alumni Golden Jubilee Endowment Prize by the Alumni Association of Anna University for maintaining the highest CGPA. + Aravind Mehta Memorial Award by the Alumni Association of Anna University for securing the highest marks in Mathematics III course in the college. EXTRA/CO - CURRICULAR ACTIVITIES: + I was an active member of the SIGARCH, the computer architecture research group at Anna University, India. + I have won a number of certificates and prizes in Oratorical, Essay Writing and Quiz Competitions. RESPONSIBILITIES: + I had been an active member and organizer of Abacus, the technical symposium of DCSE, Anna University, India. + NSS (National Service Scheme) volunteer. Attended a 15-day camp at a village near Chennai, India during June 2001. Also played an active role in organizing a free medical camp for the poor villagers there. SPECIAL INTERESTS: Meditation, Cricket and Tamil Poems