Reading List
Last Updated
Thu Jan 18 14:48:50 CST 2001
This page present papers pertinent to 757. As the semester goes on,
Hill will assign various papers to be read carefully or read for their
gist. This list will also be updated periodically. Hill will make clear
which papers students are responsible for on exams.
Location key:
- (Bn) means in Chapter n of Hill, Jouppi,
and Sohi's "Readings in Computer Architecture"
- (Wn) means in Chapter n of Hill, Jouppi,
and Sohi's web component at URL
http://www.mkp.com/architecture-readings/wc/
- (other) means not in either of the above.
Introduction and Methods
- Mark D. Hill, Norman P. Jouppi, and Gurindar S. Sohi,
Introduction to Chapter 9 "Multiprocessors and Multicomputers," from
Readings in Computer Architecture, Morgan Kaufmann,
2000 (B9). Reference only: This seven-page introduction presents
a higher-level view of where we are going than our text's Chapter 1.
- William A. Wulf and Samuel P. Harbison,
Reflections in a pool of processors/An experience report on C.mmp/Hydra,
Proc. Nation Computer Conference (AFIPS),
June 1978 (B9).
- Luiz Andre Barroso, Kourosh Gharachorloo, and Edward Bugnion,
Memory System Characterization of Commercial Workloads,
Proc. International Symposium on Computer Architecture,
June 1998 (other:
pdf).
- Mark D. Hill, Norman P. Jouppi, and Gurindar S. Sohi,
Chapter 2 "Methods" from
Readings in Computer Architecture Web Component, Morgan Kaufmann,
2000 (W2: html). Reference only: this chapter points to several good resourses,
including benchmarks and simulators.
- Thorsten von Eicken, David E. Culler, Seth C. Goldstein and Klaus E. Schauser,
Active Messages: a Mechanism for Integrating Communication and Computation,
Proc. 19th Annual Symposium on Computer Architecture,
May 1992 (other:
ps).
Mainline Multiprocessors
- Mark D. Hill, Norman P. Jouppi, and Gurindar S. Sohi,
Chapter 9 "Multiprocessors and Multicomputers," from
Readings in Computer Architecture Web Component, Morgan Kaufmann,
2000 (W9: html). Reference only: this chapter points to several good papers
beyond those included in this reader.
- Alan Charlesworth.
Starfire: Extending the SMP Envelope,
IEEE Micro,
January/February 1998, pp. 39-49
(W9: pdf).
- Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Wolf-Dietrich Weber,
Anoop Gupta, John Hennessy, Mark Horowitz, and Monica Lam.
The Stanford DASH Multiprocessor,
IEEE Computer,
March 1992, pp. 63-79 (B9).
- James Laudon and Daniel Lenoski
The SGI Origin: A ccNUMA Highly Scalable Server.
In Proceedings of International Symposium on Computer Architecture,
pages 241-251, June 1997
(W9: pdf).
Memory Consistency Models
- Leslie Lamport,
How to Make a Multiprocessor Computer that Correctly
Executes Multiprocess Programs,
IEEE Tran. on Computers,
September 1979, pp. 690-691 (B9).
- Sarita V. Adve and Kourosh Gharachorloo,
Shared Memory Consistency Models: A Tutorial,
IEEE Computer,
29(12):66-76, December 1996
(W9: ps).
- Mark D. Hill,
Multiprocessors Should Support Simple Memory Consistency Models,
IEEE Computer,
August 1998
(W9: pdf).
Trends
- Erik Hagersten, Anders Landin, and Seif Haridi,
DDM--A Cache-Only Memory Architecture,
IEEE Computer,
September 1992 pp. 44-54 (B9).
- E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Plakal, Daniel J. Sorin,
Mark D. Hill, and David A. Wood,
Multicast Snooping: A New Coherence Method Using a Multicast Address Network,
Proc. International Symposium on Computer Architecture,
May 1999
(other: pdf).
- Kourosh Gharachorloo, Madhu Sharma, Simon Steely, and Stephen Von Doren
Architecture and Design of AlphaServer GS320,
Proceedings of International Conference on
Architectural Support for Programming Languages and Operating Systems,
November 2000
(other: TBA).
- Luiz Andre Barroso, Kourosh Gharachorloo, Robert McNamara,
Andreas Nowatzyk, Shaz Qadeer, Barton Sano, Scott Smith,
Robert Stets, and Ben Verghese.
Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing,
Proc. International Symposium on Computer Architecture,
June 2000, pp. 282-293.
(W9: pdf).
Other Multiprocessors and Multicomputers
- Steven L. Scott,
Synchronization and Communication in the T3E Multiprocessor,
Proceedings of International Conference on
Architectural Support for Programming Languages and Operating Systems,
pages 26-36, October 1996
(W9: pdf).
- Seitz?
- Kai Li and Paul Hudak
Memory Coherence in Shared Virtual Memory Systems,
ACM Tran. on Computer Systems,
November 1989, pp. 321-359 (B9).
- Steven K. Reinhardt, James R. Larus, and David A. Wood,
Tempest and Typhoon: User-Level Shared Memory,
Proc. of International Symposium on Computer Architecture,
June 1994
(other: pdf).
- Arvind and Rishiyur S. Nikhil,
Executing a Program on the MIT Tagged-Token Dataflow Architecture,
IEEE Trans. on Computers,
Mar 1990, pp. 300-318
(B5).
- D. J. Kuck and R. A. Stokes,
The Burroughs Scientific Processor (BSP),
IEEE Trans. on Computers,
May 1982, pp. 363-373
(B8).
- M. Gokhale, B. Holmes, and K. Iobst,
Processing in Memory: The Terasys Massively Parallel PIM Array,
IEEE Computer,
April 1995, pp. 23-31
(B8).
Interconnects
- Lionel M. Ni and Philip McKinley.
A Survey of Wormhole Routing Techniques in Direct Networks,
IEEE Computer,
February 1993, pp. 62-76
(B7).
- Duato?
- Dave Dunning et. al.,
The Virtual Interface Architecture,
IEEE Micro,
18(2), March/April 1998, pp 66-76
(W7: TBA).