> ~markhill
Publications & Talks
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See also:
Simple,
Most Cited,
Top Picks, and
Google Scholar Page.
For online papers and pages not published in hardcopy venues,
please see Web-Only Pubs.
For all online papers from projects Hill has co-led--including
papers not co-authored by Hill--please see:
- Why 'Correct' Computers Can Leak Your Information
Mark D. Hill,
Communications of ACM (CACM),
DOI:10.1145/3399740, July 2020.
Local copy: PDF
A one-page Technical Perspective introduction to
a Research Highlights article by the original Spectre authors.
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Adaptive computer cache architecture,
Jason Lowe-Power, David A. Wood, and Mark D. Hill,
United States Patent 10,713,165, issued July 14, 2020
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Ph.D. Student Advice from a 1980s Ph.D. Student,
Mark D. Hill
The Young Architect Workshop (YArch) (for new grad students), delivered virtually in March 2020.
Talk Slides: pptx
Talk Video: YouTube
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Mentoring and Managing Graduate Students,
Mark D. Hill
CRA Mentoring Workshop (for new faculty), February 2020.
Talk Slides: pptx
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Eckert-Mauchly Award 2019,
Mark D. Hill
Talk at ISCA Award Luncheon,
June 2019.
Award: html
Slides: pptx and pdf (27MB each)
Audio: m4a (16MB)
Video for most of 30-minute talk:
YouTube (recommended) or
mp4 (backup)
Video after gap for 2-minutes thank yous:
YouTube (recommended) or
mp4 (backup)
Word Clouds of
coauthors png and
title keywords png
See also IEEE Micro paper: PDF
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Don't Persist All : Efficient Persistent Data Structures,
Pratyush Mahapatra, Mark D. Hill, Michael M. Swift,
May 2019.
ArXiv: html/pdf
- On the Spectre and Meltdown Processor Security Vulnerabilities
Mark D. Hill, Jon Masters, Parthasarathy Ranganathan, Paul Turner, and John Hennessy,
IEEE Micro Special Issue on Hot Chips 2018,
DOI 10.1109/MM.2019.2897677, March/April 2019.
Local copy: PDF
See 2018 for slides and video of Hot Chips Keynote/Panel.
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Three Other Models of Computer System Performance,
Mark D. Hill,
December 2018.
ArXiv: html/pdf
Two blog posts: html
and html
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Spectre/Meltdown,
John Hennessy, Paul Turner, Jon Masters, and Mark D. Hill,
Keynote/Panel at the Hot Chips, August 2018
June 2018.
Hill Slides: pptx
All Panel Slides: pdf
Panel Video: Youtube
Follow-on IEEE Micro paper: PDF
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On the Implications of the Meltdown & Spectre Design Flaws,
Mark D. Hill, Paul Kocher, Ruby B. Lee, Simha Sethumadhavan, and Timothy Sherwood,
Panel at the 45th International Symposium on Computer Architecture (ISCA'16).
June 2018.
Panel Slides: pptx
Panel Info: html
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DRAM cache with tags and data jointly stored in physical rows,
Gabriel H. Loh and Mark D. Hill,
United States Patent 9,753,858, issued September 5, 2017
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Efficient memory management system for computers supporting virtual machines,
Jayneel Gandhi, Mark D. Hill, Michael M. Swift,
United States Patent 9,619,401 issued Apr 11, 2017
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I/O memory management unit providing self invalidated mapping,
Arkaprava Basu, Mark D. Hill, Michael M. Swift,
United States Patent 9,954,603, issued Jan 17, 2017
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Computer Architecture 1975-2025,
Mark D. Hill
Distinguished Lecture at Johns Hopkins University.
Combines a review of 20th century computer architecture and
21st Century Computer Architecture [CCC 2012]
November 2016
Talk: pptx
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Method for memory consistency among heterogeneous computer components,
Derek R. Hower, Mark D. Hill, David Wood, Steven K. Reinhardt, Benedict R. Gaster, Blake A. Hechtman, Bradford M. Beckmann,
United States Patent 9,361,118, issued May 12, 2016
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Methods and apparatus for soft-partitioning of a data cache for stack data,
Lena E. Olson, Yasuko Eckert, Vikas K. Sridharan, James M. O'Connor, Mark D. Hill, Srilatha Manne,
United States Patent 9,298,615, issued March 29, 2016
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Virtual memory management system with reduced latency,
Arkaprava Basu, Mark D. Hill, and Michael M. Swift
United States Patent 9,158,704, issued October 13, 2015.
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System and method for cache organization in row-based memories,
Gabriel H. Loh and Mark D. Hill,
United States Patent 8,954,672, issued February 10, 2015.
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Hardware filter for tracking block presence in large caches,
Gabriel H. Loh and Mark D. Hill,
United States Patent 8,868,843 issued October 21, 2014.
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21st Century Computer Architecture,
Mark D. Hill
Opening Keynote for
IEEE International Symposium On High Performance Computer Architecture (HPCA),
ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), and
International Symposium on Code Generation and Optimization (CGO).
February 2014
Talk: pptx
This talk extends and expands work from
21st Century Computer Architecture [CCC 2012]
and Efficient Virtual Memory for Big Memory Servers [ISCA 2013].
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Preparing for the next 50 years,
UW-Madison Computer Sciences, 2014
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Sequential Consistency for Heterogeneous-Race-Free:
Programmer-centric Memory Models for Heterogeneous Platforms,
Derek R. Hower, Bradford M. Beckmann, Benedict R. Gaster, Blake A. Hechtman,
Mark D. Hill, Steven K. Reinhardt, and David A. Wood,
Workshop on Memory Systems Performance and Correctness (MSPC)
June 2013
Talk: pdf
See expanded and extended version in ASPLOS 2014.
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Research Directions for 21st Century Computer Systems,
Panelists: Mark Hill (Moderator), Sarita Adve, Kathyrn McKinley, Josep Torrellas, and Emmett Witchel
International Conference on Architectural Support for
Programming Languages and Operating Systems (ASPLOS),
March 2013.
Panel Statement: pdf
Panel Slides: pptx
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Non-broadcast Signature-based Transactional Memory,
David A. Wood, Mark D. Hill, Michael M. Swift, Michael R. Marty, Luke Yen, Kevin E. Moore, Jayaram Bobba, and Haris Volos
United States Patent 8,239,633 B2 issued August 7, 2012.
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Advancing Computer Systems without Technology Progress
,
Mark D. Hill and Christos Kozyrakis,
ISAT Outbrief, April 17-18, 2012, of DARPA/ISAT Workshop, March 26-27, 2012.
Cited by and contributed to
DARPA Electronics Resurgence Initiative, $75M in 2017 and projected to grow to $1.5B.
Talk: pdf
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System and method for enhancing communication between devices in a computer system,
David Wood,
Robert C. Zak, Jr.,
Monica Wong-Chan,
Christopher J. Jackson,
Thomas P. Webber,
and Mark D. Hill,
United States Patent 7,225,383, issued May 29, 2007.
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A Wiki for Discussing and Promoting Best Practices in Research,
Mark D. Hill, Jean-Luc Gaudiot, Mary Hall, Joe Marks, Paolo Prinetto,
and Donna Baglio,
Communications of the ACM (CACM), September 2006.
Paper: pdf
Reference:
ACM
Wiki: http://wiki.acm.org/healthcc/
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Computer system implementing synchronized broadcast using skew control and queuing,
Robert E. Cypher, Mark D. Hill, and David A. Wood,
United States Patent 7,136,980 issued November 14, 2006.
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Token based cache-coherence protocol,
Milo M. Martin, Mark D. Hill, and David A. Wood,,
United States Patent 6,981,097 issued December 27, 2005.
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Bandwidth-adaptive, hybrid, cache-coherence protocol,
Milo M. Martin, Daniel J. Sorin, Mark D. Hill, and David A. Wood,,
United States Patent 6,883,070 issued April 19, 2005.
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Computer Science:
Reflections on the Field, Reflections from the Field,
Mary Shaw, et al.,
The National Academy Press, 2011
Online Book: html
Chapter 2a: Harnessing Moore's Law,
Mark D. Hill
Online Chapter: html
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Hierarchical SMP computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,826,660 issued November 30, 2004.
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Method and device for a context-based memory management system,
Borus Ostrovsky,
Daniel R. Cassiday,
John R. Feehrer,
David A. Wood,
Pazhani Pillai,
Christopher J. Jackson,
Mark D. Hill,
United States Patent 6,826,671 issued November 30, 2004.
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Skewed finite hashing function,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,654,866 issued November 25, 2003.
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Repeater for use in a shared memory computing system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,578,071 issued June 10, 2003.
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Methods and apparatus for a directory-less memory access protocol
in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,574,659 issued June 3, 2003.
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Hybrid memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,496,854 issued December 17, 2002.
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Methods and apparatus for a directory-less memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,377,980 issued April 23, 2002.
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Skewed finite hashing function,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,308,246 issued October 23, 2001.
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Hybrid memory access protocol in a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,243,742 issued June 5, 2001.
Also European Union Patent 0818732 and Japanese Patent 10177518.
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Shared memory system for symmetric multiprocessor systems,
Erik E. Hagersten and Mark D. Hill,
United States Patent 6,226,671 issued May 1, 2001.
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Exploiting Market Realities To Address National Security's
High-Performance Computing Needs,
Mark D. Hill,
In
Defense Science Study Group 1998-1999, Volume 1: Papers 1-13,
Institute for Defense Analysis (IDA) Paper P-3531, 2000.
Technical Report: pdf
Talk: ppt
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Formation of a National Entity for Information Infrastructure Protection,
Geoffrey C. Orsak, Mark D. Hill, and Robin R. Murphy,
In
Defense Science Study Group 1998-1999, Volume 1: Papers 1-13,
Institute for Defense Analysis (IDA) Paper P-3531, 2000.
Technical Report: pdf
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Cachable interface control registers for high speed data transfer,
David A. Wood, Steven K. Reinhardt, Shubhendu S. Mukherjee, Babak Falsafi,
Mark D. Hill, and Robert W. Pfile,
United States Patent 5,951,657 issued September 14, 1999.
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Methods and apparatus for substantially memory-less coherence
transformer for connecting computer node coherence domains,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,940,860 issued August 17, 1999.
Also European Union Patent 0817068 and Japanese Patent 11003277.
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Split-SMP computer system configured to operate in a protected mode having
repeater which inhibits transaction to local address partition,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,923,847 issued July 13, 1999.
Also European Union Patent 0817094 and Japanese Patent 10187646.
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Skip-level write-through in a multi-level memory
of a computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,903,907 issued May 11, 1999.
Also European Union Patent 0817079 and Japanese Patent 11003280.
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Efficient allocation of cache memory space in a computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,893,150 issued April 6, 1999.
Also European Union Patent 0817078 and Japanese Patent 10214229.
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Multiprocessor system configured to detect and efficiently provide for migratory data access patterns,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,734,922 issued March 31, 1999.
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Method and apparatus for a directory-less memory access protocol in
a distributed shared memory computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,873,117 issued February 16, 1999.
Also European Union Patent 0817067 and Japanese Patent 10134009.
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Hybrid memory access protocol for servicing memory access request by
ascertaining whether the memory block is currently cached in determining
which protocols to be used,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,864,671 issued January 26, 1999.
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Hierarchical SMP computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,862,357 issued January 19, 1999.
Also European Union Patent 0817060 and Japanese Patent 10187630.
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Methods and apparatus for a coherence transformer for connecting
computer system coherence domains,
Erik E. Hagersten, Mark D. Hill, and David A. Wood,
United States Patent 5,860,109 issued January 12, 1999.
Also European Union Patent 0817065 and Japanese Patent 10214222.
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Guest Editor's Introduction:
Design Challenges for High-Performance Network Interfaces
Andrew A. Chien, Mark D. Hill, and Shubhendu S. Mukherjee,
IEEE Computer, November 1998.
Paper: pdf.
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Making Network Interfaces Less Peripheral,
Shubhendu S. Mukherjee and Mark D. Hill,
IEEE Computer, October 1998.
Paper: pdf.
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Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory,
Ioannis Schoinas, Babak Falsafi, Mark D. Hill,
James R. Larus, and David A. Wood,
International Conference on Parallel Architectures and
Compilation Techniques (PACT 98), October 1998.
Paper: pdf
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A Retrospective on "Weak Ordering -- A New Definition,"
Sarita V. Adve and Mark D. Hill,
Selected Papers from the First 25
International Symposia on Computer Architecture
(Gurindar S. Sohi, editor, ACM Press), 1998.
Paper: pdf
Reference:
ACM
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Using Prediction to Accelerate Coherence Protocols,
Shubhendu S. Mukherjee and Mark D. Hill,
International Symposium on Computer Architecture (ISCA), 1998.
Paper: pdf.
Reference:
ACM
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The Impact of Data Transfer and Buffering Alternatives on
Network Interface Design,
Shubhendu S. Mukherjee and Mark D. Hill,
International Symposium on High-Performance Computer Architecture (HPCA), 1998.
Paper: pdf
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Address Translation Mechanisms in Network Interfaces,
Ioannis Schoinas and Mark D. Hill,
International Symposium on High-Performance Computer Architecture (HPCA), 1998.
Paper: pdf
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Methods and apparatus for sharing stored data objects in a computer system,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,835,906 issued November 10, 1998.
Also European Union Patent 0817040 and Japanese Patent 10187527.
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Methods and apparatus for a coherence transformer with limited memory
for connecting computer system coherence domains,
Erik E. Hagersten, Mark D. Hill, and David A. Wood,
United States Patent 5,829,034 issued October 27, 1998.
Also European Union Patent 0817069 and Japanese Patent 10187633.
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Efficient storage of data in computer systmes with multiple cache levels,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,802,563 issued September 1, 1998.
Also European Union Patent 0817080 and Japanese Patent 10214224.
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Extended symmetrical multiprocessor address mapping,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,796,605 issued August 18, 1998.
(Hill was officially added as a co-inventor on June 27, 1998, correcting a
filing error.)
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Extended symmetrical multiprocessor architecture,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,754,877 issued May 19, 1998.
Also European Union Patent 0817092 and Japanese Patent 10097513.
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Multiprocessing system configured to detect and efficiently provide
for migratory data access patterns,
Erik E. Hagersten and Mark D. Hill,
United States Patent 5,734,922 issued March 31, 1998.
Also European Union Patent 0817071 and Japanese Patent 10143483.
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Relaxed Consistency and Coherence Granularity in DSM Systems:
A Performance Evaluation,
Yuanyuan Zhou, Liviu Iftode, Jaswinder Pal Singh, Kai Li, Brian
R. Toonen, Ioannis Schoinas, Mark D. Hill, and David A. Wood,
SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP),
June 1997.
Paper: pdf.
Reference:
ACM
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Parallel Computer Research in the Wisconsin Wind Tunnel Project,
Mark D. Hill, James R. Larus, and David A. Wood,
NSF Conference on Experimental Research in Computer Systems, June 1996.
Paper: pdf
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Bidirectional Technology Transfer: Sabbaticals in Industry,
Mark D. Hill,
NSF Conference on Experimental Research in Computer Systems, June 1996.
Reprinted in Computing Research News, November 1997.
Paper: pdf
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Coherent Network Interfaces for Fine-Grain Communication,
Shubhendu S. Mukherjee,
Babak Falsafi,
Mark D. Hill, and
David A. Wood,
International Symposium on Computer Architecture (ISCA), 1996.
Paper: pdf.
Reference:
ACM
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Optimistic Simulation of Parallel Architectures Using Program Executables,
Sashikanth Chandrasekaran and Mark D. Hill,
Workshop on Parallel and Distributed Simulation (PADS), May 1996.
Paper: pdf.
Reference:
ACM
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A New Page Table for 64-bit Address Spaces,
Madhusudhan Talluri, Mark D. Hill, and Yousef A. Khalidi,
Symposium on Operating Systems Principals (SOSP),
December 1995.
Paper: pdf
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Presidential Young Investigator Award Final Report,
Mark D. Hill,
July 1995.
Paper: pdf
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Efficient Support for Irregular Applications on Distributed-Memory Machines,
Shubhendu S. Mukherjee, Shamik D. Sharma, Mark D. Hill, James R. Larus,
Anne Rogers, and Joel Saltz,
SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP),
July 1995.
Paper: pdf.
Reference:
ACM
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Cost-Effective Parallel Computing,
David A. Wood and Mark D. Hill,
IEEE Computer, February 1995.
Paper: final scanned pdf
and near-final latex pdf.
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Solving Microstructure Electrostatics on a Proposed Parallel Computer,
Frank Traenkle, Mark D. Hill, and Sangtae Kim,
Computers and Chemical Engineering, 1995.
Paper: pdf
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Application-Specific Protocols for User-Level Shared Memory,
Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, Ioannis Schoinas,
Mark D. Hill James R. Larus, Anne Rogers, and David A. Wood,
Supercomputing '94, Nov. 1994.
Paper: pdf
Reference:
ACM
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Surpassing the TLB Performance of Superpages with Less Operating System Support,
Madhusudhan Talluri and Mark D. Hill,
International Conference on Architectural Support for
Programming Languages and Operating Systems (ASPLOS),
October 1994.
Paper: pdf
Reference:
ACM
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An Evaluation of Directory Protocols for Medium-Scale Shared-Memory
Multiprocessors,
Shubhendu S. Mukherjee and Mark D. Hill,
International Conference on Supercomputing (ICS), July 1994.
Paper: pdf
Reference:
ACM
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A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches,
R. E. Kessler, Mark D. Hill, and David A. Wood,
IEEE Transactions on Computers, June 1994.
Paper: pdf
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Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors,
Mark D. Hill, James R. Larus, Steven K. Reinhardt, and David A. Wood,
ACM Transactions on Computer Systems (TOCS), November 1993.
Updated version of ASPLOS 1992 paper.
Paper: final scanned pdf
and near-final latex pdf.
Reference:
ACM
-
Wisconsin Architectural Research Tool Set (WARTS),
Mark D. Hill, James R. Larus, Alvin R. Lebeck, Madhusudhan Talluri,
and David A. Wood,
Computer Architecture News (CAN), August 1993.
Web Site: pdf
Paper: pdf
Reference:
ACM
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Cache Performance of the SPEC92 Benchmark Suite,
Jeffrey D. Gee, Mark D. Hill, Dionisios N. Pnevmatikatos, and Alan Jay Smith,
IEEE Micro, August 1993.
Paper: pdf
Reference:
ACM
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A Unified Formalization of Four Shared-Memory Models,
Sarita V. Adve and Mark D. Hill,
IEEE Transactions on Parallel and Distributed Systems (TPDS), June 1993.
Paper: final scanned pdf
and near-final troff pdf
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Performance Implications of Tolerating Cache Faults,
Andreas Farid Pour and Mark D. Hill,
IEEE Transactions on Computers (TOC), March 1993.
Paper: final scanned pdf
and near-final troff pdf
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Mechanisms for Cooperative Shared Memory,
David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus,
Alvin R. Lebeck, James C. Lewis, Shubhendu S. Mukherjee, Subbarao Palacharla,
and Steven K. Reinhardt,
International Symposium on Computer Architecture (ISCA), May 1993.
Paper: pdf
Reference:
ACM
-
The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers,
Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck,
James C. Lewis, and David A. Wood,
ACM SIGMETRICS, May 1993.
Paper: pdf
Reference:
ACM
-
Page Placement Algorithms for Large Real-Index Caches,
R. E. Kessler and Mark D. Hill,
ACM Transactions on Computer Systems, November 1992.
Paper: final scanned pdf
and near-final troff pdf
Reference:
ACM
-
Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors,
Mark D. Hill, James R. Larus, Steven K. Reinhardt, and David A. Wood,
International Conference on Architectural Support for
Programming Languages and Operating Systems (ASPLOS),
October 1992.
Recommended for ACM Transactions on Computer Systems (TOCS), November 1993.
Paper: pdf
and updated scanned pdf
Reference:
ACM
-
Programming for Different Memory Consistency Models,
Kourosh Gharachorloo, Sarita V. Adve, Anoop Gupta,
John L. Hennessy, and Mark D. Hill,
Journal of Parallel and Distributed Computing, August 1992.
Paper: pdf
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Tradeoffs in Supporting Two Page Sizes,
Madhusudhan Talluri, Shing Kong, Mark D. Hill, and David A. Patterson,
International Symposium on Computer Architecture (ISCA), May 1992.
Paper: pdf
Reference:
ACM
-
Detecting Data Races on Weak Memory Systems,
Sarita V. Adve, Mark D. Hill, Barton P. Miller, and Robert H. B. Netzer,
International Symposium on Computer Architecture (ISCA), June 1991.
Paper: pdf
Reference:
ACM
-
Comparison of Hardware and Software Cache Coherence Schemes,
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, and Mary K. Vernon,
International Symposium on Computer Architecture (ISCA), June 1991.
Paper: pdf
Reference:
ACM
-
A Model for Estimating Trace-Sample Miss Ratios,
David A. Wood, Mark D. Hill, and R. E. Kessler
ACM SIGMETRICS, May 1991.
Paper: pdf
Reference:
ACM
-
Implementing Stack Simulation for Highly-Associative Memories (extended abstract)
Yul H. Kim, Mark D. Hill, and David A. Wood,
ACM SIGMETRICS, May 1991.
Paper: pdf
-
Implementing Sequential Consistency In Cache-Based Systems,
Sarita V. Adve and Mark D. Hill,
International Conference on Parallel Processing, August 1990.
Paper: pdf
-
Weak Ordering - A New Definition,
Sarita V. Adve and Mark D. Hill,
International Symposium on Computer Architecture (ISCA), June 1990.
Paper: pdf.
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Cache Considerations for Multiprocessor Programmers,
Mark D. Hill and James R. Larus,
Communications of the ACM (CACM), August 1990.
Paper: scanned pdf
(3.2 MB for a scan of 6 pages!).
Reference:
ACM
-
What is Scalability?,
Mark D. Hill
ACM SIGARCH Computer Architecture News, December 1990.
Paper: pdf
Reference:
ACM
-
Cache performance of the integer SPEC benchmarks on a RISC,
Mark D. Hill and Dionisios N. Pnevmatikatos
ACM SIGARCH Computer Architecture News, June 1990.
Paper: pdf
Reference:
ACM
-
Evaluating Associativity in CPU Caches,
Mark D. Hill and Alan Jay Smith,
IEEE Transactions on Computers (TOC), December 1989.
Paper: scanned pdf.
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A VLSI Chip Set for a Multiprocessor Workstation - Part I: A RISC
Microprocessor with Coprocessor Interface
and Support for Symbolic Processing,
David D. Lee, Shing I. Kong, Mark D. Hill, George S. Taylor, David A. Hodges,
Randy H. Katz, and David A. Patterson,
IEEE Journal of Solid State Circuits (JSSC), December 1989.
Paper: scanned pdf.
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Inexpensive Implementations of Set-Associativity,
R. E. Kessler, Richard Jooss, Alvin Lebeck, and Mark D. Hill,
International Symposium on Computer Architecture (ISCA), June 1989.
Paper: pdf
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Test Driving Your Next Cache,
Mark D. Hill,
Magazine of Intellignet Personal Systems (MIPS), August 1989.
Paper: scanned pdf
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Design Decisions in SPUR,
M. D. Hill, S. J. Eggers, J. R. Larus, G. S. Taylor, G. Adams,
B. K. Bose, G. A. Gibson, P. M. Hansen, J. Keller, S. I. Kong,
C. G. Lee, D. Lee, J. M. Pendleton, S. A. Ritchie, D. A. Wood,
B. G. Zorn, P. N. Hilfinger, D. Hodges, R. H. Katz, J. Ousterhout,
and D. A. Patterson,
IEEE Computer, November 1986.
Paper: scanned pdf
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An In-Cache Address Translation Mechanism,
David A. Wood, Susan J. Eggers, Garth Gibson, Mark D. Hill,
Joan Pendleton, Scott A. Ritchie, Randy H. Katz, and David A. Patterson,
International Symposium on Computer Architecture (ISCA), June 1986.
Paper: scanned pdf
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Evaluation of On-Chip Cache Memories,
Mark D. Hill,
Masters Report,
University of California, Berkeley,
December 8, 1983.
Thesis:
scanned pdf
(5 MB)
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Architecture of a VLSI Instruction Cache,
David A. Patterson, Phil Garrison, Mark D. Hill, Dimitris Lioupis,
Chris Nyberg, Tim N. Sippel, and Korbin S. Van Dyke,
International Symposium on Computer Architecture (ISCA), June 1983.
Paper: scanned pdf.