J. E. Smith and A. R. Pleszkun. Implementing Precise Interrupts in Pipelined Processors, IEEE Trans. on Computers, May 1988, pp. 562-573. ACM DL Link |
1) All instruction preceding the instruction have been executed and have modified processor state correctly
2) All instr following the instruction indicated by the saved program counter are unexecuted and have not modified
3) Saved program counter points to the interrupted instruction.
Classification of interrupts
1) program interrupts
2) external interrupts.
I/O timer interrupts (for restarting), virtual memory page faults, software debugging, arithmetic exceptions, unimplemented opcodes. virtual machines can be implemented if privileged instructions faults cause precise interrupts.