(2.5.4) Shekar Borkar Transistor variability

Shubhendu S. Mukherjee, Christoper Weaver, Joel Emer, Steven K. Reinhardt, and Todd Austin, "Measuring Architectural Vulnerability Factors," Top picks of 2003 in IEEE Micro, Nov/Dec 2003. IEEE Xplore link

Focus 
     Energy consumption
     Power dissipation
     Power delivery
Later
     Stuck at faults, single-event upsets (cosmic rays, 8% increase over generation)
     device degradation

Cause of variations
     random dopant variations (in channel > threshold variations)
     sub-wavelength lithography
     heat flux (dynamic variation)

tolerant design
     leakage invp speed (body bias to control)
     freq + active/leakage power distribution > synopsys
     deterministic to probabilistic /statistic 
     
burn in > high voltage, high temp for short periods just after the chips are manufactured to accelerate aging > faults can be caught fast

synthesis : 
     design (multivariate for) perf, active and leakage power, reliability, yield and bin splits.
Physical : 
     Razor
Arch :      
     Reliability and security engine
     small checker hardware
     resilient hardware > multicore redundant