Sarita V. Adve and Kourosh Gharachorloo. Shared Memory Consistency Models: A Tutorial, IEEE Computer, December 1996, pp. 66-76. IEEE Xplore link |
(1) All cores insert their loads and stores into the order <m respecting their program order,
regardless of whether they are to the same or different addresses (i.e., a=b or a≠b). There are four
cases:
If L(a) <p L(b) ⇒ L(a) <m L(b) /* Load→Load */
If L(a) <p S(b) ⇒ L(a) <m S(b) /* Load→Store */
If S(a) <p S(b) ⇒ S(a) <m S(b) /* Store→Store */
If S(a) <p L(b) ⇒ S(a) <m L(b) /* Store→Load */
(2) Every load gets its value from the last store before it (in global memory order) to the same
address:
Value of L(a) = Value of MAX <m {S(a) | S(a) <m L(a)}, where MAX <m denotes “latest in
Coherence makes caches invisible. Consistency can make shared memory
(1) All cores insert their loads and stores into the memory order <m respecting their program
order, regardless of whether they are to the same or different addresses (i.e., a==b or a!=b). There
are four cases:
If L(a) <p L(b) ⇒ L(a) <m L(b) /* Load → Load */
If L(a) <p S(b) ⇒ L(a) <m S(b) /* Load → Store */
If S(a) <p S(b) ⇒ S(a) <m S(b) /* Store → Store */
If S(a) <p L(b) ==> S(a) <m L(b) /* Store-->Load */ /* Change 1: Enable FIFO Write
Buffer */
(2) Every load gets its value from the last store before it to the same address:
Value of L(a) = Value of MAX <m {S(a) | S(a) <m L(a)} /* Change 2: Need Bypassing */